[llvm-commits] [llvm] r132317 - in /llvm/trunk: include/llvm/Target/ lib/MC/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MBlaze/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PTX/ lib/Target/PowerPC/ lib/Target/PowerPC/InstPrinter/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/X86/InstPrinter/ lib/Target/XCore/ test/CodeGen/X86/ utils/TableGen/

[Jim Grosbach]

On Jun 1, 2011, at 6:48 PM, Rafael Ávila de Espíndola wrote:

> On 11-06-01 8:44 PM, Jim Grosbach wrote:
>> Rafael,
>> 
>> This patch appears to assume that all backends format register names as "%<name>" in their assembly, or at least can parse registers named as such. That's very much not true. The AsmStreamer shouldn't be hard-coding this sort of target specific logic.
<snip>
>> 
> 
> I will fix it, sorry.

No worries. Thanks!
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