[llvm-commits] [llvm] r132291 - in /llvm/trunk: autoconf/configure.ac include/llvm/ADT/Triple.h lib/Support/Triple.cpp lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/eh-resume-darwin.ll

[John McCall]

Author: rjmccall
Date: Sun May 29 14:39:04 2011
New Revision: 132291

URL: http://llvm.org/viewvc/llvm-project?rev=132291&view=rev
Log:
On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).


Added:
    llvm/trunk/test/CodeGen/ARM/eh-resume-darwin.ll
Modified:
    llvm/trunk/autoconf/configure.ac
    llvm/trunk/include/llvm/ADT/Triple.h
    llvm/trunk/lib/Support/Triple.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/autoconf/configure.ac
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=132291&r1=132290&r2=132291&view=diff
==============================================================================
--- llvm/trunk/autoconf/configure.ac (original)
+++ llvm/trunk/autoconf/configure.ac Sun May 29 14:39:04 2011
@@ -605,7 +605,7 @@
   enableval=host
 fi
 case "$enableval" in
-  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 SystemZ Blackfin CBackend CppBackend MBlaze PTX" ;;
+  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Glulx Mips CellSPU XCore MSP430 SystemZ Blackfin CBackend CppBackend MBlaze PTX" ;;
   *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
       case "$a_target" in
         x86)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -614,6 +614,7 @@
         powerpc)  TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
         alpha)    TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
         arm)      TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
+        glulx)    TARGETS_TO_BUILD="Glulx $TARGETS_TO_BUILD" ;;
         mips)     TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
         spu)      TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
         xcore)    TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;

Modified: llvm/trunk/include/llvm/ADT/Triple.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=132291&r1=132290&r2=132291&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/Triple.h (original)
+++ llvm/trunk/include/llvm/ADT/Triple.h Sun May 29 14:39:04 2011
@@ -50,6 +50,7 @@
     arm,     // ARM; arm, armv.*, xscale
     bfin,    // Blackfin: bfin
     cellspu, // CellSPU: spu, cellspu
+    glulx,   // Glulx: glulx, glulx1, glulx2, glulx3
     mips,    // MIPS: mips, mipsallegrex
     mipsel,  // MIPSEL: mipsel, mipsallegrexel, psp
     msp430,  // MSP430: msp430

Modified: llvm/trunk/lib/Support/Triple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=132291&r1=132290&r2=132291&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Triple.cpp (original)
+++ llvm/trunk/lib/Support/Triple.cpp Sun May 29 14:39:04 2011
@@ -27,6 +27,7 @@
   case arm:     return "arm";
   case bfin:    return "bfin";
   case cellspu: return "cellspu";
+  case glulx:   return "glulx";
   case mips:    return "mips";
   case mipsel:  return "mipsel";
   case msp430:  return "msp430";
@@ -62,6 +63,8 @@
 
   case cellspu: return "spu";
 
+  case glulx:   return "glulx";
+
   case ppc64:
   case ppc:     return "ppc";
 
@@ -139,6 +142,8 @@
     return bfin;
   if (Name == "cellspu")
     return cellspu;
+  if (Name == "glulx")
+    return glulx;
   if (Name == "mips")
     return mips;
   if (Name == "mipsel")
@@ -277,6 +282,8 @@
     return thumb;
   else if (ArchName.startswith("alpha"))
     return alpha;
+  else if (ArchName.startswith("glulx"))
+    return glulx;
   else if (ArchName == "spu" || ArchName == "cellspu")
     return cellspu;
   else if (ArchName == "msp430")

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=132291&r1=132290&r2=132291&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Sun May 29 14:39:04 2011
@@ -656,6 +656,7 @@
     setOperationAction(ISD::EH_SJLJ_SETJMP, MVT::i32, Custom);
     setOperationAction(ISD::EH_SJLJ_LONGJMP, MVT::Other, Custom);
     setOperationAction(ISD::EH_SJLJ_DISPATCHSETUP, MVT::Other, Custom);
+    setLibcallName(RTLIB::UNWIND_RESUME, "_Unwind_SjLj_Resume");
   }
 
   setOperationAction(ISD::SETCC,     MVT::i32, Expand);

Added: llvm/trunk/test/CodeGen/ARM/eh-resume-darwin.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/eh-resume-darwin.ll?rev=132291&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/eh-resume-darwin.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/eh-resume-darwin.ll Sun May 29 14:39:04 2011
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+target triple = "armv6-apple-macosx10.6"
+
+declare void @func()
+
+declare i8* @llvm.eh.exception() nounwind readonly
+
+declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind
+
+declare void @llvm.eh.resume(i8*, i32)
+
+declare i32 @__gxx_personality_sj0(...)
+
+define void @test0() {
+entry:
+  invoke void @func()
+    to label %cont unwind label %lpad
+
+cont:
+  ret void
+
+lpad:
+  %exn = call i8* @llvm.eh.exception()
+  %sel = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exn, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i32 0)
+  call void @llvm.eh.resume(i8* %exn, i32 %sel) noreturn
+  unreachable
+}
+
+; CHECK: __Unwind_SjLj_Resume