[llvm-commits] [llvm] r132222 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMAsmPrinter.h test/CodeGen/ARM/debug-i
Eli Friedman
eli.friedman at gmail.com
Fri May 27 15:42:31 PDT 2011
On Fri, May 27, 2011 at 3:05 PM, Rafael Espindola
<rafael.espindola at gmail.com> wrote:
> Author: rafael
> Date: Fri May 27 17:05:41 2011
> New Revision: 132222
>
> URL: http://llvm.org/viewvc/llvm-project?rev=132222&view=rev
> Log:
> Make size computation less brittle.
This is breaking tests:
******************** TEST 'LLVM ::
CodeGen/X86/2010-05-25-DotDebugLoc.ll' FAILED
********************Script:
--
/Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/llc
-march=x86-64 -O2 <
/Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
| /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/FileCheck
/Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
/Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/llc
-march=x86-64 -O2 -regalloc=basic <
/Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
| /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/FileCheck
/Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
--
Exit Code: 1
Command Output (stderr):
--
/Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll:7:15:
error: expected string not found in input
; CHECK-NEXT: .Ltmp
^
<stdin>:738:9: note: scanning from here
.short Lset14
^
<stdin>:744:16: note: possible intended match here
Lset15 = Ltmp39-Ltmp38 ## Loc expr size
^
--
********************
-Eli
> Modified:
> llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
> llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
> llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
> llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
> llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h
> llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll
> llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
> llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
> llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll
> llvm/trunk/test/CodeGen/X86/dbg-value-range.ll
>
> Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Fri May 27 17:05:41 2011
> @@ -386,10 +386,6 @@
> /// operands.
> virtual MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
>
> - /// getDwarfRegOpSize - get size required to emit given machine location
> - /// using dwarf encoding.
> - virtual unsigned getDwarfRegOpSize(const MachineLocation &MLoc) const;
> -
> /// getISAEncoding - Get the value for DW_AT_APPLE_isa. Zero if no isa
> /// encoding specified.
> virtual unsigned getISAEncoding() { return 0; }
>
> Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)
> +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Fri May 27 17:05:41 2011
> @@ -760,26 +760,6 @@
> return MachineLocation();
> }
>
> -/// getDwarfRegOpSize - get size required to emit given machine location using
> -/// dwarf encoding.
> -unsigned AsmPrinter::getDwarfRegOpSize(const MachineLocation &MLoc) const {
> - const TargetRegisterInfo *RI = TM.getRegisterInfo();
> - unsigned DWReg = RI->getDwarfRegNum(MLoc.getReg(), false);
> - if (int Offset = MLoc.getOffset()) {
> - // If the value is at a certain offset from frame register then
> - // use DW_OP_breg.
> - if (DWReg < 32)
> - return 1 + MCAsmInfo::getSLEB128Size(Offset);
> - else
> - return 1 + MCAsmInfo::getULEB128Size(MLoc.getReg())
> - + MCAsmInfo::getSLEB128Size(Offset);
> - }
> - if (DWReg < 32)
> - return 1;
> -
> - return 1 + MCAsmInfo::getULEB128Size(DWReg);
> -}
> -
> /// EmitDwarfRegOp - Emit dwarf register operation.
> void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const {
> const TargetRegisterInfo *TRI = TM.getRegisterInfo();
>
> Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
> +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Fri May 27 17:05:41 2011
> @@ -2586,17 +2586,16 @@
> Asm->OutStreamer.EmitSymbolValue(Entry.Begin, Size, 0);
> Asm->OutStreamer.EmitSymbolValue(Entry.End, Size, 0);
> DIVariable DV(Entry.Variable);
> + Asm->OutStreamer.AddComment("Loc expr size");
> + MCSymbol *begin = Asm->OutStreamer.getContext().CreateTempSymbol();
> + MCSymbol *end = Asm->OutStreamer.getContext().CreateTempSymbol();
> + Asm->EmitLabelDifference(end, begin, 2);
> + Asm->OutStreamer.EmitLabel(begin);
> if (DV.hasComplexAddress()) {
> unsigned N = DV.getNumAddrElements();
> unsigned i = 0;
> - Asm->OutStreamer.AddComment("Loc expr size");
> if (N >= 2 && DV.getAddrElement(0) == DIBuilder::OpPlus) {
> if (Entry.Loc.getOffset()) {
> - unsigned Size = Asm->getDwarfRegOpSize(Entry.Loc);
> - unsigned OffsetSize =
> - MCAsmInfo::getSLEB128Size(DV.getAddrElement(1));
> - // breg + deref + plus + offset
> - Asm->EmitInt16(Size + 1 + 1 + OffsetSize + N - 2);
> i = 2;
> Asm->EmitDwarfRegOp(Entry.Loc);
> Asm->OutStreamer.AddComment("DW_OP_deref");
> @@ -2608,12 +2607,10 @@
> // If first address element is OpPlus then emit
> // DW_OP_breg + Offset instead of DW_OP_reg + Offset.
> MachineLocation Loc(Entry.Loc.getReg(), DV.getAddrElement(1));
> - Asm->EmitInt16(Asm->getDwarfRegOpSize(Loc) + N - 2);
> Asm->EmitDwarfRegOp(Loc);
> i = 2;
> }
> } else {
> - Asm->EmitInt16(Asm->getDwarfRegOpSize(Entry.Loc) + N);
> Asm->EmitDwarfRegOp(Entry.Loc);
> }
>
> @@ -2628,10 +2625,9 @@
> else llvm_unreachable("unknown Opcode found in complex address");
> }
> } else {
> - Asm->OutStreamer.AddComment("Loc expr size");
> - Asm->EmitInt16(Asm->getDwarfRegOpSize(Entry.Loc));
> Asm->EmitDwarfRegOp(Entry.Loc);
> }
> + Asm->OutStreamer.EmitLabel(end);
> }
> }
> }
>
> Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Fri May 27 17:05:41 2011
> @@ -172,45 +172,6 @@
> return Location;
> }
>
> -/// getDwarfRegOpSize - get size required to emit given machine location using
> -/// dwarf encoding.
> -unsigned ARMAsmPrinter::getDwarfRegOpSize(const MachineLocation &MLoc) const {
> - const TargetRegisterInfo *RI = TM.getRegisterInfo();
> - if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1)
> - return AsmPrinter::getDwarfRegOpSize(MLoc);
> - else {
> - unsigned Reg = MLoc.getReg();
> - if (Reg >= ARM::S0 && Reg <= ARM::S31) {
> - assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering");
> - // S registers are described as bit-pieces of a register
> - // S[2x] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 0)
> - // S[2x+1] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 32)
> -
> - unsigned SReg = Reg - ARM::S0;
> - unsigned Rx = 256 + (SReg >> 1);
> - // DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB
> - // 1 + ULEB(Rx) + 1 + 1 + 1
> - return 4 + MCAsmInfo::getULEB128Size(Rx);
> - }
> -
> - if (Reg >= ARM::Q0 && Reg <= ARM::Q15) {
> - assert(ARM::Q0 + 15 == ARM::Q15 && "Unexpected ARM Q register numbering");
> - // Q registers Q0-Q15 are described by composing two D registers together.
> - // Qx = DW_OP_regx(256+2x) DW_OP_piece(8) DW_OP_regx(256+2x+1) DW_OP_piece(8)
> -
> - unsigned QReg = Reg - ARM::Q0;
> - unsigned D1 = 256 + 2 * QReg;
> - unsigned D2 = D1 + 1;
> -
> - // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8) +
> - // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8);
> - // 6 + ULEB(D1) + ULEB(D2)
> - return 6 + MCAsmInfo::getULEB128Size(D1) + MCAsmInfo::getULEB128Size(D2);
> - }
> - }
> - return 0;
> -}
> -
> /// EmitDwarfRegOp - Emit dwarf register operation.
> void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const {
> const TargetRegisterInfo *RI = TM.getRegisterInfo();
>
> Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h (original)
> +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h Fri May 27 17:05:41 2011
> @@ -89,10 +89,6 @@
>
> MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
>
> - /// getDwarfRegOpSize - get size required to emit given machine location
> - /// using dwarf encoding.
> - virtual unsigned getDwarfRegOpSize(const MachineLocation &MLoc) const;
> -
> /// EmitDwarfRegOp - Emit dwarf register operation.
> virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const;
>
>
> Modified: llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll Fri May 27 17:05:41 2011
> @@ -6,7 +6,9 @@
> ;CHECK: Ldebug_loc0:
> ;CHECK-NEXT: .long Ltmp1
> ;CHECK-NEXT: .long Ltmp3
> -;CHECK-NEXT: .short 6 @ Loc expr size
> +;CHECK-NEXT: Lset9 = Ltmp10-Ltmp9 @ Loc expr size
> +;CHECK-NEXT: .short Lset9
> +;CHECK-NEXT: Ltmp9:
> ;CHECK-NEXT: .byte 144 @ DW_OP_regx for S register
>
> define void @_Z3foov() optsize ssp {
>
> Modified: llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll Fri May 27 17:05:41 2011
> @@ -3,6 +3,8 @@
> ; Test to check .debug_loc support. This test case emits many debug_loc entries.
>
> ; CHECK: Loc expr size
> +; CHECK-NEXT: .short
> +; CHECK-NEXT: .Ltmp
> ; CHECK-NEXT: DW_OP_reg
>
> %0 = type { double }
>
> Modified: llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll Fri May 27 17:05:41 2011
> @@ -68,9 +68,15 @@
> ; CHECK: Ldebug_loc0:
> ; CHECK-NEXT: .quad Lfunc_begin0
> ; CHECK-NEXT: .quad [[LABEL]]
> -; CHECK-NEXT: .short 1
> +; CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}} ## Loc expr size
> +; CHECK-NEXT: .short Lset{{.*}}
> +; CHECK-NEXT: Ltmp{{.*}}:
> ; CHECK-NEXT: .byte 85
> +; CHECK-NEXT: Ltmp{{.*}}:
> ; CHECK-NEXT: .quad [[LABEL]]
> ; CHECK-NEXT: .quad [[CLOBBER]]
> -; CHECK-NEXT: .short 1
> +; CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}} ## Loc expr size
> +; CHECK-NEXT: .short Lset{{.*}}
> +; CHECK-NEXT: Ltmp{{.*}}:
> ; CHECK-NEXT: .byte 83
> +; CHECK-NEXT: Ltmp{{.*}}:
> \ No newline at end of file
>
> Modified: llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll Fri May 27 17:05:41 2011
> @@ -6,8 +6,11 @@
> ;CHECK: Ldebug_loc0:
> ;CHECK-NEXT: .quad Lfunc_begin0
> ;CHECK-NEXT: .quad L
> -;CHECK-NEXT: .short 1 ## Loc expr size
> +;CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}} ## Loc expr size
> +;CHECK-NEXT: .short Lset
> +;CHECK-NEXT: Ltmp
> ;CHECK-NEXT: .byte 85 ## DW_OP_reg5
> +;CHECK-NEXT: Ltmp7
> ;CHECK-NEXT: .quad 0
> ;CHECK-NEXT: .quad 0
>
>
> Modified: llvm/trunk/test/CodeGen/X86/dbg-value-range.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-value-range.ll?rev=132222&r1=132221&r2=132222&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/dbg-value-range.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/dbg-value-range.ll Fri May 27 17:05:41 2011
> @@ -53,7 +53,10 @@
> ;CHECK:Ldebug_loc0:
> ;CHECK-NEXT: .quad
> ;CHECK-NEXT: .quad [[CLOBBER]]
> -;CHECK-NEXT: .short 1
> +;CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}}
> +;CHECK-NEXT: .short Lset
> +;CHECK-NEXT: Ltmp
> ;CHECK-NEXT: .byte 85
> +;CHECK-NEXT: Ltmp
> ;CHECK-NEXT: .quad 0
> ;CHECK-NEXT: .quad 0
>
>
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