[llvm-commits] [dragonegg] r132189 - /dragonegg/trunk/src/Convert.cpp

[Duncan Sands]

Author: baldrick
Date: Fri May 27 10:24:37 2011
New Revision: 132189

URL: http://llvm.org/viewvc/llvm-project?rev=132189&view=rev
Log:
Implement VEC_RSHIFT_EXPR and VEC_LSHIFT_EXPR correctly, fixing PR10033.

Modified:
    dragonegg/trunk/src/Convert.cpp

Modified: dragonegg/trunk/src/Convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/src/Convert.cpp?rev=132189&r1=132188&r2=132189&view=diff
==============================================================================
--- dragonegg/trunk/src/Convert.cpp (original)
+++ dragonegg/trunk/src/Convert.cpp Fri May 27 10:24:37 2011
@@ -6795,25 +6795,22 @@
 Value *TreeToLLVM::EmitReg_VecShiftOp(tree op0, tree op1, unsigned Opc) {
   Value *LHS = EmitRegister(op0); // A vector.
   Value *Amt = EmitRegister(op1); // An integer.
+  const Type *VecTy = LHS->getType();
 
-  // Ensure the shift amount has the same type as the vector element type.
-  const VectorType *VecTy = cast<VectorType>(LHS->getType());
-  const Type *EltTy = VecTy->getElementType();
-  if (Amt->getType() != EltTy)
-    Amt = Builder.CreateIntCast(Amt, EltTy, /*isSigned*/false,
+  // Turn the vector into a mighty integer of the same size.
+  unsigned Bits = VecTy->getPrimitiveSizeInBits();
+  LHS = Builder.CreateBitCast(LHS, IntegerType::get(Context, Bits));
+
+  // Ensure the shift amount has the same type.
+  if (Amt->getType() != LHS->getType())
+    Amt = Builder.CreateIntCast(Amt, LHS->getType(), /*isSigned*/false,
                                 Amt->getName()+".cast");
 
-  // Form a vector with all elements equal to the shift amount by creating a
-  // vector with the amount as the first element then shuffling it all over.
-  Constant *Zero = Constant::getNullValue(Type::getInt32Ty(Context));
-  Value *RHS = Builder.CreateInsertElement(UndefValue::get(VecTy), Amt, Zero);
-  const Type *MaskTy = VectorType::get(Type::getInt32Ty(Context),
-                                       VecTy->getNumElements());
-  Constant *Mask = ConstantInt::get(MaskTy, 0);
-  RHS = Builder.CreateShuffleVector(RHS, UndefValue::get(VecTy), Mask);
+  // Perform the shift.
+  LHS = Builder.CreateBinOp((Instruction::BinaryOps)Opc, LHS, Amt);
 
-  // Form the shift.
-  return Builder.CreateBinOp((Instruction::BinaryOps)Opc, LHS, RHS);
+  // Turn the result back into a vector.
+  return Builder.CreateBitCast(LHS, VecTy);
 }
 
 Value *TreeToLLVM::EmitReg_TruthOp(tree type, tree op0, tree op1, unsigned Opc){
@@ -8342,8 +8339,7 @@
   case VEC_PACK_TRUNC_EXPR:
     RHS = EmitReg_VEC_PACK_TRUNC_EXPR(type, rhs1, rhs2); break;
   case VEC_RSHIFT_EXPR:
-    RHS = EmitReg_VecShiftOp(rhs1, rhs2, TYPE_UNSIGNED(TREE_TYPE(type)) ?
-                             Instruction::LShr : Instruction::AShr);
+    RHS = EmitReg_VecShiftOp(rhs1, rhs2, Instruction::LShr);
     break;
   case VEC_UNPACK_HI_EXPR:
     RHS = EmitReg_VEC_UNPACK_HI_EXPR(type, rhs1); break;