[llvm-commits] MIPS patch

[Akira Hatanaka]

Any pass that is run after register allocation can do this (I haven't found
a way to do this before RA). I inserted this pass right after register
allocation so that the post-RA scheduler can schedule real instructions as
opposed to pseudo instructions. I am not totally sure delaying this until
after post-RA scheduling will not have adverse effect on the quality of the
schedule generated (For ExtractElementF64, it probably doesn't matter
whether you do this before or after RA since it is already split into 2
instructions, but for BuildPairF64, I don;t know).

On Thu, Apr 14, 2011 at 10:20 PM, Chris Lattner <clattner at apple.com> wrote:

>
> On Apr 14, 2011, at 5:35 PM, Akira Hatanaka wrote:
>
> > Made minor changes per discussion with Bruno.
>
> Do you really need another pass to do this?  Why not just handle this
> during mc inst lowering?
>
> +++ lib/Target/Mips/MipsExpandPseudoInstrs.cpp  (revision 0)
> @@ -0,0 +1,116 @@
> +//===-- ExpandPseudoInstrs.cpp - Mips delay slot filler
> ---------------------===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
>
> Please correct the filename and comment and make sure the line fits 80
> columns.
>
> -Chris
>
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