[llvm-commits] [llvm] r127766 - in /llvm/trunk: docs/LangRef.html include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h test/CodeGen/X86/bool-zext.ll
Cameron Zwarich
zwarich at apple.com
Wed Mar 16 15:20:18 PDT 2011
Author: zwarich
Date: Wed Mar 16 17:20:18 2011
New Revision: 127766
URL: http://llvm.org/viewvc/llvm-project?rev=127766&view=rev
Log:
The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte
rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.
This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.
Modified:
llvm/trunk/docs/LangRef.html
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.h
llvm/trunk/test/CodeGen/X86/bool-zext.ll
Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=127766&r1=127765&r2=127766&view=diff
==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Wed Mar 16 17:20:18 2011
@@ -1017,8 +1017,9 @@
<dl>
<dt><tt><b>zeroext</b></tt></dt>
<dd>This indicates to the code generator that the parameter or return value
- should be zero-extended to a 32-bit value by the caller (for a parameter)
- or the callee (for a return value).</dd>
+ should be zero-extended to the extent required by the target's ABI (which
+ is usually 32-bits, but is 8-bits for a i1 on x86-64) by the caller (for a
+ parameter) or the callee (for a return value).</dd>
<dt><tt><b>signext</b></tt></dt>
<dd>This indicates to the code generator that the parameter or return value
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=127766&r1=127765&r2=127766&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Mar 16 17:20:18 2011
@@ -1287,6 +1287,17 @@
return false;
}
+ /// getTypeForExtendedInteger - Return the type that should be used to zero or
+ /// sign extend a zeroext/signext integer argument or return value.
+ /// FIXME: Most C calling convention requires the return type to be promoted,
+ /// but this is not true all the time, e.g. i1 on x86-64. It is also not
+ /// necessary for non-C calling conventions. The frontend should handle this
+ /// and include all of the necessary information.
+ virtual MVT
+ getTypeForExtendedInteger(EVT VT, ISD::NodeType ExtendKind) const {
+ return MVT::i32;
+ }
+
/// LowerOperationWrapper - This callback is invoked by the type legalizer
/// to legalize nodes with an illegal operand type but legal result types.
/// It replaces the LowerOperation callback in the type Legalizer.
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=127766&r1=127765&r2=127766&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Mar 16 17:20:18 2011
@@ -1128,12 +1128,9 @@
else if (F->paramHasAttr(0, Attribute::ZExt))
ExtendKind = ISD::ZERO_EXTEND;
- // FIXME: C calling convention requires the return type to be promoted
- // to at least 32-bit. But this is not necessary for non-C calling
- // conventions. The frontend should mark functions whose return values
- // require promoting with signext or zeroext attributes.
if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
- EVT MinVT = TLI.getRegisterType(*DAG.getContext(), MVT::i32);
+ MVT ReturnMVT = TLI.getTypeForExtendedInteger(VT, ExtendKind);
+ EVT MinVT = TLI.getRegisterType(*DAG.getContext(), ReturnMVT);
if (VT.bitsLT(MinVT))
VT = MinVT;
}
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=127766&r1=127765&r2=127766&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Mar 16 17:20:18 2011
@@ -1448,6 +1448,15 @@
return HasRet;
}
+MVT
+X86TargetLowering::getTypeForExtendedInteger(EVT VT,
+ ISD::NodeType ExtendKind) const {
+ // TODO: Is this also valid on 32-bit?
+ if (Subtarget->is64Bit() && VT == MVT::i1 && ExtendKind == ISD::ZERO_EXTEND)
+ return MVT::i8;
+ return MVT::i32;
+}
+
/// LowerCallResult - Lower the result values of a call into the
/// appropriate copies out of appropriate physical registers.
///
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=127766&r1=127765&r2=127766&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Mar 16 17:20:18 2011
@@ -843,6 +843,9 @@
virtual bool isUsedByReturnOnly(SDNode *N) const;
+ virtual MVT
+ getTypeForExtendedInteger(EVT VT, ISD::NodeType ExtendKind) const;
+
virtual bool
CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
Modified: llvm/trunk/test/CodeGen/X86/bool-zext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bool-zext.ll?rev=127766&r1=127765&r2=127766&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bool-zext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bool-zext.ll Wed Mar 16 17:20:18 2011
@@ -6,7 +6,7 @@
define void @bar1(i1 zeroext %v1) nounwind ssp {
entry:
%conv = zext i1 %v1 to i32
- %call = tail call i32 (...)* @foo(i32 %conv) nounwind
+ %call = tail call i32 (...)* @foo1(i32 %conv) nounwind
ret void
}
@@ -16,8 +16,20 @@
define void @bar2(i8 zeroext %v1) nounwind ssp {
entry:
%conv = zext i8 %v1 to i32
- %call = tail call i32 (...)* @foo(i32 %conv) nounwind
+ %call = tail call i32 (...)* @foo1(i32 %conv) nounwind
ret void
}
-declare i32 @foo(...)
+; CHECK: @bar3
+; CHECK: callq
+; CHECK-NOT: movzbl
+; CHECK-NOT: and
+; CHECK: ret
+define zeroext i1 @bar3() nounwind ssp {
+entry:
+ %call = call i1 @foo2() nounwind
+ ret i1 %call
+}
+
+declare i32 @foo1(...)
+declare zeroext i1 @foo2()
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