[llvm-commits] [llvm] r127456 - in /llvm/trunk/utils/TableGen: DAGISelEmitter.cpp DAGISelMatcher.h DAGISelMatcherEmitter.cpp DAGISelMatcherGen.cpp
Jim Grosbach
grosbach at apple.com
Thu Mar 10 18:19:02 PST 2011
Author: grosbach
Date: Thu Mar 10 20:19:02 2011
New Revision: 127456
URL: http://llvm.org/viewvc/llvm-project?rev=127456&view=rev
Log:
Teach TableGen to pre-calculate register enum values when creating the
CodeGenRegister entries. Use this information to more intelligently build
the literal register entires in the DAGISel matcher table. Specifically,
use a single-byte OPC_EmitRegister entry for registers with a value of
less than 256 and OPC_EmitRegister2 entry for registers with a larger value.
rdar://9066491
Modified:
llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
llvm/trunk/utils/TableGen/DAGISelMatcher.h
llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp
llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp
Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=127456&r1=127455&r2=127456&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Thu Mar 10 20:19:02 2011
@@ -148,12 +148,8 @@
Matcher *TheMatcher = new ScopeMatcher(&PatternMatchers[0],
PatternMatchers.size());
- CodeGenTarget Target(Records);
- const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
- bool useEmitRegister2 = Registers.size() > 255;
-
TheMatcher = OptimizeMatcher(TheMatcher, CGP);
//Matcher->dump();
- EmitMatcherTable(TheMatcher, CGP, useEmitRegister2, OS);
+ EmitMatcherTable(TheMatcher, CGP, OS);
delete TheMatcher;
}
Modified: llvm/trunk/utils/TableGen/DAGISelMatcher.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelMatcher.h?rev=127456&r1=127455&r2=127456&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelMatcher.h (original)
+++ llvm/trunk/utils/TableGen/DAGISelMatcher.h Thu Mar 10 20:19:02 2011
@@ -17,6 +17,7 @@
#include "llvm/Support/Casting.h"
namespace llvm {
+ struct CodeGenRegister;
class CodeGenDAGPatterns;
class Matcher;
class PatternToMatch;
@@ -29,7 +30,7 @@
const CodeGenDAGPatterns &CGP);
Matcher *OptimizeMatcher(Matcher *Matcher, const CodeGenDAGPatterns &CGP);
void EmitMatcherTable(const Matcher *Matcher, const CodeGenDAGPatterns &CGP,
- bool useEmitRegister2, raw_ostream &OS);
+ raw_ostream &OS);
/// Matcher - Base class for all the the DAG ISel Matcher representation
@@ -816,13 +817,13 @@
class EmitRegisterMatcher : public Matcher {
/// Reg - The def for the register that we're emitting. If this is null, then
/// this is a reference to zero_reg.
- Record *Reg;
+ const CodeGenRegister *Reg;
MVT::SimpleValueType VT;
public:
- EmitRegisterMatcher(Record *reg, MVT::SimpleValueType vt)
+ EmitRegisterMatcher(const CodeGenRegister *reg, MVT::SimpleValueType vt)
: Matcher(EmitRegister), Reg(reg), VT(vt) {}
- Record *getReg() const { return Reg; }
+ const CodeGenRegister *getReg() const { return Reg; }
MVT::SimpleValueType getVT() const { return VT; }
static inline bool classof(const Matcher *N) {
Modified: llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp?rev=127456&r1=127455&r2=127456&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp Thu Mar 10 20:19:02 2011
@@ -43,11 +43,9 @@
DenseMap<Record*, unsigned> NodeXFormMap;
std::vector<Record*> NodeXForms;
- bool useEmitRegister2;
-
public:
- MatcherTableEmitter(const CodeGenDAGPatterns &cgp, bool _useEmitRegister2)
- : CGP(cgp), useEmitRegister2(_useEmitRegister2) {}
+ MatcherTableEmitter(const CodeGenDAGPatterns &cgp)
+ : CGP(cgp) {}
unsigned EmitMatcherList(const Matcher *N, unsigned Indent,
unsigned StartIdx, formatted_raw_ostream &OS);
@@ -431,25 +429,20 @@
return 3;
}
- case Matcher::EmitRegister:
- if (useEmitRegister2) {
- OS << "OPC_EmitRegister2, "
- << getEnumName(cast<EmitRegisterMatcher>(N)->getVT()) << ", ";
- if (Record *R = cast<EmitRegisterMatcher>(N)->getReg())
- OS << "TARGET_VAL(" << getQualifiedName(R) << "),\n";
- else {
- OS << "TARGET_VAL(0) ";
- if (!OmitComments)
- OS << "/*zero_reg*/";
- OS << ",\n";
- }
+ case Matcher::EmitRegister: {
+ const EmitRegisterMatcher *Matcher = cast<EmitRegisterMatcher>(N);
+ const CodeGenRegister *Reg = Matcher->getReg();
+ // If the enum value of the register is larger than one byte can handle,
+ // use EmitRegister2.
+ if (Reg && Reg->EnumValue > 255) {
+ OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", ";
+ OS << "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n";
return 4;
} else {
- OS << "OPC_EmitRegister, "
- << getEnumName(cast<EmitRegisterMatcher>(N)->getVT()) << ", ";
- if (Record *R = cast<EmitRegisterMatcher>(N)->getReg())
- OS << getQualifiedName(R) << ",\n";
- else {
+ OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", ";
+ if (Reg) {
+ OS << getQualifiedName(Reg->TheDef) << ",\n";
+ } else {
OS << "0 ";
if (!OmitComments)
OS << "/*zero_reg*/";
@@ -457,6 +450,7 @@
}
return 3;
}
+ }
case Matcher::EmitConvertToTarget:
OS << "OPC_EmitConvertToTarget, "
@@ -800,14 +794,13 @@
void llvm::EmitMatcherTable(const Matcher *TheMatcher,
const CodeGenDAGPatterns &CGP,
- bool useEmitRegister2,
raw_ostream &O) {
formatted_raw_ostream OS(O);
OS << "// The main instruction selector code.\n";
OS << "SDNode *SelectCode(SDNode *N) {\n";
- MatcherTableEmitter MatcherEmitter(CGP, useEmitRegister2);
+ MatcherTableEmitter MatcherEmitter(CGP);
OS << " // Some target values are emitted as 2 bytes, TARGET_VAL handles\n";
OS << " // this.\n";
Modified: llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp?rev=127456&r1=127455&r2=127456&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp Thu Mar 10 20:19:02 2011
@@ -9,7 +9,9 @@
#include "DAGISelMatcher.h"
#include "CodeGenDAGPatterns.h"
+#include "CodeGenRegisters.h"
#include "Record.h"
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include <utility>
@@ -91,6 +93,10 @@
/// CurPredicate - As we emit matcher nodes, this points to the latest check
/// which should have future checks stuck into its Next position.
Matcher *CurPredicate;
+
+ /// RegisterDefMap - A map of register record definitions to the
+ /// corresponding target CodeGenRegister entry.
+ DenseMap<const Record *, const CodeGenRegister *> RegisterDefMap;
public:
MatcherGen(const PatternToMatch &pattern, const CodeGenDAGPatterns &cgp);
@@ -159,6 +165,12 @@
// If there are types that are manifestly known, infer them.
InferPossibleTypes();
+
+ // Populate the map from records to CodeGenRegister entries.
+ const CodeGenTarget &CGT = CGP.getTargetInfo();
+ const std::vector<CodeGenRegister> &Registers = CGT.getRegisters();
+ for (unsigned i = 0, e = Registers.size(); i != e; ++i)
+ RegisterDefMap[Registers[i].TheDef] = &Registers[i];
}
/// InferPossibleTypes - As we emit the pattern, we end up generating type
@@ -578,7 +590,8 @@
// If this is an explicit register reference, handle it.
if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
if (DI->getDef()->isSubClassOf("Register")) {
- AddMatcher(new EmitRegisterMatcher(DI->getDef(), N->getType(0)));
+ AddMatcher(new EmitRegisterMatcher(RegisterDefMap[DI->getDef()],
+ N->getType(0)));
ResultOps.push_back(NextRecordedOperandNo++);
return;
}
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