[llvm-commits] [llvm] r127306 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp test/Transforms/InstCombine/2011-03-08-SRemMinusOneBadOpt.ll

[Eli Friedman]

Author: efriedma
Date: Tue Mar  8 19:28:35 2011
New Revision: 127306

URL: http://llvm.org/viewvc/llvm-project?rev=127306&view=rev
Log:
PR9346: Prevent SimplifyDemandedBits from incorrectly introducing
INT_MIN % -1.


Added:
    llvm/trunk/test/Transforms/InstCombine/2011-03-08-SRemMinusOneBadOpt.ll
Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=127306&r1=127305&r2=127306&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Tue Mar  8 19:28:35 2011
@@ -684,6 +684,10 @@
     break;
   case Instruction::SRem:
     if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
+      // X % -1 demands all the bits because we don't want to introduce
+      // INT_MIN % -1 (== undef) by accident.
+      if (Rem->isAllOnesValue())
+        break;
       APInt RA = Rem->getValue().abs();
       if (RA.isPowerOf2()) {
         if (DemandedMask.ult(RA))    // srem won't affect demanded bits

Added: llvm/trunk/test/Transforms/InstCombine/2011-03-08-SRemMinusOneBadOpt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2011-03-08-SRemMinusOneBadOpt.ll?rev=127306&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2011-03-08-SRemMinusOneBadOpt.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2011-03-08-SRemMinusOneBadOpt.ll Tue Mar  8 19:28:35 2011
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; PR9346
+
+define i32 @test(i64 %x) nounwind {
+; CHECK: ret i32 0
+entry:
+  %or = or i64 %x, 4294967294
+  %conv = trunc i64 %or to i32
+  %rem.i = srem i32 %conv, -1
+  ret i32 %rem.i
+}
+