[llvm-commits] [llvm] r126213 - /llvm/trunk/test/CodeGen/X86/test-shrink.ll

[NAKAMURA Takumi]

Author: chapuni
Date: Tue Feb 22 01:21:33 2011
New Revision: 126213

URL: http://llvm.org/viewvc/llvm-project?rev=126213&view=rev
Log:
Relax expressions and add explicit triplets -linux and -win32.

Modified:
    llvm/trunk/test/CodeGen/X86/test-shrink.ll

Modified: llvm/trunk/test/CodeGen/X86/test-shrink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-shrink.ll?rev=126213&r1=126212&r2=126213&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/test-shrink.ll (original)
+++ llvm/trunk/test/CodeGen/X86/test-shrink.ll Tue Feb 22 01:21:33 2011
@@ -1,8 +1,9 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64
 ; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
 
 ; CHECK-64: g64xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
 ; CHECK-32: g64xh:
 ; CHECK-32:   testb $8, %ah
@@ -19,7 +20,7 @@
   ret void
 }
 ; CHECK-64: g64xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64:   testb $8, [[A0L:%dil|%cl]]
 ; CHECK-64:   ret
 ; CHECK-32: g64xl:
 ; CHECK-32:   testb $8, %al
@@ -36,7 +37,7 @@
   ret void
 }
 ; CHECK-64: g32xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
 ; CHECK-32: g32xh:
 ; CHECK-32:   testb $8, %ah
@@ -53,7 +54,7 @@
   ret void
 }
 ; CHECK-64: g32xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64:   testb $8, [[A0L]]
 ; CHECK-64:   ret
 ; CHECK-32: g32xl:
 ; CHECK-32:   testb $8, %al
@@ -70,7 +71,7 @@
   ret void
 }
 ; CHECK-64: g16xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
 ; CHECK-32: g16xh:
 ; CHECK-32:   testb $8, %ah
@@ -87,7 +88,7 @@
   ret void
 }
 ; CHECK-64: g16xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64:   testb $8, [[A0L]]
 ; CHECK-64:   ret
 ; CHECK-32: g16xl:
 ; CHECK-32:   testb $8, %al
@@ -104,7 +105,7 @@
   ret void
 }
 ; CHECK-64: g64x16:
-; CHECK-64:   testw $-32640, %di
+; CHECK-64:   testw $-32640, %[[A0W:di|cx]]
 ; CHECK-64:   ret
 ; CHECK-32: g64x16:
 ; CHECK-32:   testw $-32640, %ax
@@ -121,7 +122,7 @@
   ret void
 }
 ; CHECK-64: g32x16:
-; CHECK-64:   testw $-32640, %di
+; CHECK-64:   testw $-32640, %[[A0W]]
 ; CHECK-64:   ret
 ; CHECK-32: g32x16:
 ; CHECK-32:   testw $-32640, %ax
@@ -138,7 +139,7 @@
   ret void
 }
 ; CHECK-64: g64x32:
-; CHECK-64:   testl $268468352, %edi
+; CHECK-64:   testl $268468352, %e[[A0W]]
 ; CHECK-64:   ret
 ; CHECK-32: g64x32:
 ; CHECK-32:   testl $268468352, %eax