[llvm-commits] [llvm] r124724 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/Utils/SimplifyCFG.cpp test/Transforms/SimplifyCFG/switch_create.ll test/Transforms/SimplifyCFG/switch_formation.dbg.ll

[Frits van Bommel]

On Wed, Feb 2, 2011 at 4:56 PM, Benjamin Kramer
<benny.kra at googlemail.com> wrote:
> +/// TurnSwitchRangeIntoICmp - Turns a switch with that contains only a
> +/// integer range comparison into a sub, an icmp and a branch.
> +static bool TurnSwitchRangeIntoICmp(SwitchInst *SI) {
> +  assert(SI->getNumCases() > 2 && "Degenerate switch?");
> +  // We can do this transform if the switch consists of an ascending series
> +  // and all cases point to the same destination.
> +  for (unsigned I = 2, E = SI->getNumCases(); I != E; ++I)
> +    if (SI->getSuccessor(I-1) != SI->getSuccessor(I) ||
> +        SI->getCaseValue(I-1)->getValue()+1 != SI->getCaseValue(I)->getValue())
> +      return false;

What about out-of-order case values? For example:

define zeroext i1 @quux(i32 %x) nounwind readnone ssp noredzone {
entry:
  switch i32 %x, label %lor.rhs [
    i32 1, label %lor.end
    i32 3, label %lor.end
    i32 2, label %lor.end
  ]

lor.rhs:                                          ; preds = %entry
  br label %lor.end

lor.end:                                          ; preds = %lor.rhs,
%entry, %entry, %entry
  %0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ],
[ true, %entry ]
  ret i1 %0
}

This is supposed to be equivalent to using ordered case values, but
your code doesn't touch this switch while it works fine if the case
values are sorted.