[llvm-commits] [llvm] r124327 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

[Devang Patel]

Author: dpatel
Date: Wed Jan 26 15:41:22 2011
New Revision: 124327

URL: http://llvm.org/viewvc/llvm-project?rev=124327&view=rev
Log:
Revert 124301.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=124327&r1=124326&r2=124327&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Wed Jan 26 15:41:22 2011
@@ -539,12 +539,8 @@
                     SmallVector<std::pair<unsigned, MachineInstr*>, 32> &Orders,
                            SmallSet<unsigned, 8> &Seen) {
   unsigned Order = DAG->GetOrdering(N);
-  if (!Order || !Seen.insert(Order)) {
-    // Process any valid SDDbgValues even if node does not have any order
-    // assigned.
-    ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, 0);
+  if (!Order || !Seen.insert(Order))
     return;
-  }
 
   MachineBasicBlock *BB = Emitter.getBlock();
   if (Emitter.getInsertPos() == BB->begin() || BB->back().isPHI()) {