[llvm-commits] [PATCH] Asm operand parsing improvements

[Bruno Cardoso Lopes]

Hi,

The first attached patch implements support for custom target specific
asm parsing of operands. This is useful to avoid adding hacks to
AsmParsers whenever something different from an immediate or register
appears. The initial motivation was to remove the "mcr" family of
hacks from ARMAsmParser, but this is also going to be useful for other
ARM system instructions which I'm about to add the correct parsing and
encoding once this gets accepted. The second attached patch contains
modifications to the ARMAsmParser so that it starts using this
mechanism.

A quick explanation of how it works (read the first patch for details):

A table like the one below is autogenerated for every instruction
containing a 'ParserMethod' in its AsmOperandClass:

static const OperandMatchEntry OperandMatchTable[20] = {
  /* Mnemonic, Operand List Mask, Operand Class, Features */
  { "cdp", 29 /* 0, 2, 3, 4 */, MCK_Coproc, Feature_IsThumb|Feature_HasV6 },
  { "cdp", 58 /* 1, 3, 4, 5 */, MCK_Coproc, Feature_IsARM },

A matcher function very similar (but lot more naive) to
MatchInstructionImpl scans the table. After the mnemonic match, the
features are checked and if the "to be parsed" operand index is
present in the mask, there's a real match. Then, a switch like the one
below dispatch the parsing to the custom method provided in
'ParseMethod':

  case MCK_Coproc:
    return TryParseCoprocessorOperandName(Operands);

Ok to commit? Suggestions?
Thanks.

-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc
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