[llvm-commits] [llvm] r123809 - in /llvm/trunk/lib/Target/ARM: ARMISelLowering.cpp ARMInstrInfo.td ARMInstrThumb2.td ARMSubtarget.cpp

[Evan Cheng]

Author: evancheng
Date: Tue Jan 18 20:16:49 2011
New Revision: 123809

URL: http://llvm.org/viewvc/llvm-project?rev=123809&view=rev
Log:
Don't forget to emit the load from indirect symbol when using movw + movt to materialize GA indirect symbols.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
    llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=123809&r1=123808&r2=123809&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Jan 18 20:16:49 2011
@@ -54,6 +54,7 @@
 using namespace llvm;
 
 STATISTIC(NumTailCalls, "Number of tail calls");
+STATISTIC(NumMovwMovt, "Number of GAs materialized with movw + movt");
 
 // This option should go away when tail calls fully work.
 static cl::opt<bool>
@@ -1955,6 +1956,7 @@
   // If we have T2 ops, we can materialize the address directly via movt/movw
   // pair. This is always cheaper.
   if (Subtarget->useMovt()) {
+    ++NumMovwMovt;
     // FIXME: Once remat is capable of dealing with instructions with register
     // operands, expand this into two nodes.
     return DAG.getNode(ARMISD::Wrapper, dl, PtrVT,
@@ -1978,6 +1980,7 @@
   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
 
   if (Subtarget->useMovt()) {
+    ++NumMovwMovt;
     // FIXME: Once remat is capable of dealing with instructions with register
     // operands, expand this into two nodes.
     if (RelocM != Reloc::PIC_)
@@ -1990,7 +1993,11 @@
     SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT,
                                  DAG.getTargetGlobalAddress(GV, dl, PtrVT),
                                  PICLabel);
-    return DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel);    
+    Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel);
+    if (Subtarget->GVIsIndirectSymbol(GV, RelocM))
+      Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Result,
+                           MachinePointerInfo::getGOT(), false, false, 0);
+    return Result;
   }
 
   unsigned ARMPCLabelIndex = 0;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=123809&r1=123808&r2=123809&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Jan 18 20:16:49 2011
@@ -3403,16 +3403,16 @@
 // This is a single pseudo instruction, the benefit is that it can be remat'd
 // as a single unit instead of having to handle reg inputs.
 // FIXME: Remove this when we can do generalized remat.
-let isReMaterializable = 1, isMoveImm = 1 in {
+let isReMaterializable = 1, isMoveImm = 1 in
 def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2,
                            [(set GPR:$dst, (arm_i32imm:$src))]>,
                            Requires<[IsARM]>;
 
+let isReMaterializable = 1 in
 def MOV_pic_ga : PseudoInst<(outs GPR:$dst),
                             (ins i32imm:$addr, pclabel:$id), IIC_iMOVix2,
                  [(set GPR:$dst, (ARMWrapperPIC tglobaladdr:$addr, imm:$id))]>,
                  Requires<[IsARM, UseMovt]>;
-} // isReMaterializable = 1, isMoveImm = 1 in
 
 // ConstantPool, GlobalAddress, and JumpTable
 def : ARMPat<(ARMWrapper  tglobaladdr :$dst), (LEApcrel tglobaladdr :$dst)>,

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=123809&r1=123808&r2=123809&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Jan 18 20:16:49 2011
@@ -3240,16 +3240,17 @@
 // 32-bit immediate using movw + movt.
 // This is a single pseudo instruction to make it re-materializable.
 // FIXME: Remove this when we can do generalized remat.
-let isReMaterializable = 1, isMoveImm = 1 in {
+let isReMaterializable = 1, isMoveImm = 1 in
 def t2MOVi32imm : PseudoInst<(outs rGPR:$dst), (ins i32imm:$src), IIC_iMOVix2,
                             [(set rGPR:$dst, (i32 imm:$src))]>,
                             Requires<[IsThumb, HasV6T2]>;
 
+// Materialize GA with movw + movt.
+let isReMaterializable = 1 in
 def t2MOV_pic_ga : PseudoInst<(outs rGPR:$dst),
                               (ins i32imm:$addr, pclabel:$id), IIC_iMOVix2,
                  [(set rGPR:$dst, (ARMWrapperPIC tglobaladdr:$addr, imm:$id))]>,
                  Requires<[IsThumb2, UseMovt]>;
-} // isReMaterializable = 1, isMoveImm = 1 in
 
 // ConstantPool, GlobalAddress, and JumpTable
 def : T2Pat<(ARMWrapper  tglobaladdr :$dst), (t2LEApcrel tglobaladdr :$dst)>,

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=123809&r1=123808&r2=123809&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Tue Jan 18 20:16:49 2011
@@ -153,7 +153,7 @@
     if (UseMOVT && hasV6T2Ops()) {
       unsigned Maj, Min, Rev;
       TargetTriple.getDarwinNumber(Maj, Min, Rev);
-      UseMovt = (Maj > 4 || Min > 2);
+      UseMovt = Maj > 4;
     }
   }