[llvm-commits] [llvm] r122583 - in /llvm/trunk: lib/MC/MachObjectWriter.cpp test/MC/MachO/darwin-Thumb-reloc.s

[Daniel Dunbar]

Author: ddunbar
Date: Mon Dec 27 08:49:49 2010
New Revision: 122583

URL: http://llvm.org/viewvc/llvm-project?rev=122583&view=rev
Log:
MC/Mach-O/Thumb: Select appropriate relocation types for Thumb.

Modified:
    llvm/trunk/lib/MC/MachObjectWriter.cpp
    llvm/trunk/test/MC/MachO/darwin-Thumb-reloc.s

Modified: llvm/trunk/lib/MC/MachObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MachObjectWriter.cpp?rev=122583&r1=122582&r2=122583&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MachObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/MachObjectWriter.cpp Mon Dec 27 08:49:49 2010
@@ -820,9 +820,9 @@
     Relocations[Fragment->getParent()].push_back(MRE);
   }
 
-  static bool getARMFixupKindMachOInfo(unsigned Kind, bool &Is24BitBranch,
+  static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
                                        unsigned &Log2Size) {
-    Is24BitBranch = false;
+    RelocType = unsigned(macho::RIT_Vanilla);
     Log2Size = ~0U;
 
     switch (Kind) {
@@ -847,21 +847,24 @@
     case ARM::fixup_arm_pcrel_10:
     case ARM::fixup_arm_adr_pcrel_12:
     case ARM::fixup_arm_branch:
-      Is24BitBranch = true;
+      RelocType = unsigned(macho::RIT_ARM_Branch24Bit);
       // Report as 'long', even though that is not quite accurate.
       Log2Size = llvm::Log2_32(4);
       return true;
 
       // Handle Thumb branches.
     case ARM::fixup_arm_thumb_br:
+      RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit);
       Log2Size = llvm::Log2_32(2);
       return true;
 
     case ARM::fixup_arm_thumb_bl:
+      RelocType = unsigned(macho::RIT_ARM_ThumbBranch32Bit);
       Log2Size = llvm::Log2_32(4);
       return true;
 
     case ARM::fixup_arm_thumb_blx:
+      RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit);
       // Report as 'long', even though that is not quite accurate.
       Log2Size = llvm::Log2_32(4);
       return true;
@@ -872,8 +875,8 @@
                            MCValue Target, uint64_t &FixedValue) {
     unsigned IsPCRel = isFixupKindPCRel(Asm, Fixup.getKind());
     unsigned Log2Size;
-    bool Is24BitBranch;
-    if (!getARMFixupKindMachOInfo(Fixup.getKind(), Is24BitBranch, Log2Size)) {
+    unsigned RelocType = macho::RIT_Vanilla;
+    if (!getARMFixupKindMachOInfo(Fixup.getKind(), RelocType, Log2Size)) {
       report_fatal_error("unknown ARM fixup kind!");
       return;
     }
@@ -896,7 +899,7 @@
     //
     // Is this right for ARM?
     uint32_t Offset = Target.getConstant();
-    if (IsPCRel && !Is24BitBranch)
+    if (IsPCRel && RelocType == macho::RIT_Vanilla)
       Offset += 1 << Log2Size;
     if (Offset && SD && !doesSymbolRequireExternRelocation(SD))
       return RecordARMScatteredRelocation(Asm, Layout, Fragment, Fixup,
@@ -940,9 +943,8 @@
       if (IsPCRel)
         FixedValue -= getSectionAddress(Fragment->getParent());
 
-      // Determine the appropriate type based on the fixup kind.
-      Type = Is24BitBranch ? (unsigned)macho::RIT_ARM_Branch24Bit :
-        (unsigned)macho::RIT_Vanilla;
+      // The type is determined by the fixup kind.
+      Type = RelocType;
     }
 
     // struct relocation_info (8 bytes)

Modified: llvm/trunk/test/MC/MachO/darwin-Thumb-reloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/MachO/darwin-Thumb-reloc.s?rev=122583&r1=122582&r2=122583&view=diff
==============================================================================
--- llvm/trunk/test/MC/MachO/darwin-Thumb-reloc.s (original)
+++ llvm/trunk/test/MC/MachO/darwin-Thumb-reloc.s Mon Dec 27 08:49:49 2010
@@ -64,7 +64,7 @@
 @ CHECK:      ('word-1', 0x0)),
 @ CHECK:     # Relocation 2
 @ CHECK:     (('word-0', 0x0),
-@ CHECK-FIXME:      ('word-1', 0x6d000001)),
+@ CHECK:      ('word-1', 0x6d000001)),
 @ CHECK:   ])
 @ CHECK-FIXME:   ('_section_data', 'fff7feef 04000000')
 @ CHECK:     # Section 1