[llvm-commits] [llvm] r122523 - /llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp

[Jim Grosbach]

Author: grosbach
Date: Thu Dec 23 17:19:54 2010
New Revision: 122523

URL: http://llvm.org/viewvc/llvm-project?rev=122523&view=rev
Log:
Recognize a few more documented register name aliases for ARM in the asm lexer.

Modified:
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp?rev=122523&r1=122522&r2=122523&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp Thu Dec 23 17:19:54 2010
@@ -121,6 +121,24 @@
     StringRef lowerRef(lowerCase);
 
     unsigned regID = MatchRegisterName(lowerRef);
+    // Check for register aliases.
+    //   r13 -> sp
+    //   r14 -> lr
+    //   r15 -> pc
+    //   ip  -> r12
+    //   FIXME: Some assemblers support lots of others. Do we want them all?
+    if (!regID) {
+     if (lowerCase.size() == 3 && lowerCase[0] == 'r'
+        && lowerCase[1] == '1') {
+       switch (lowerCase[2]) {
+       default: break;
+       case '3': regID = ARM::SP;
+       case '4': regID = ARM::LR;
+       case '5': regID = ARM::PC;
+       }
+     } else if (lowerCase == "ip")
+       regID = ARM::R12;
+    }
 
     if (regID) {
       return AsmToken(AsmToken::Register,