[llvm-commits] [llvm] r121929 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb.td

Bill Wendling isanbard at gmail.com
Wed Dec 15 16:38:41 PST 2010


Author: void
Date: Wed Dec 15 18:38:41 2010
New Revision: 121929

URL: http://llvm.org/viewvc/llvm-project?rev=121929&view=rev
Log:
Add encodings for Thumb1 Spill and Restore pseudos.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=121929&r1=121928&r2=121929&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Wed Dec 15 18:38:41 2010
@@ -694,7 +694,12 @@
 // FIXME: Pseudo for tLDRspi
 def tRestore : T1pIs<(outs tGPR:$dst), (ins t_addrmode_sp:$addr), IIC_iLoad_i,
                      "ldr", "\t$dst, $addr", []>,
-               T1LdStSP<{1,?,?}>;
+               T1LdStSP<{1,?,?}> {
+  bits<3> Rt;
+  bits<8> addr;
+  let Inst{10-8} = Rt;
+  let Inst{7-0} = addr;
+}
 
 // Load tconstpool
 // FIXME: Use ldr.n to work around a Darwin assembler bug.
@@ -745,7 +750,12 @@
 // FIXME: Pseudo for tSTRspi
 def tSpill : T1pIs<(outs), (ins tGPR:$src, t_addrmode_sp:$addr), IIC_iStore_i,
                   "str", "\t$src, $addr", []>,
-             T1LdStSP<{0,?,?}>;
+             T1LdStSP<{0,?,?}> {
+  bits<3> Rt;
+  bits<8> addr;
+  let Inst{10-8} = Rt;
+  let Inst{7-0} = addr;
+}
 
 //===----------------------------------------------------------------------===//
 //  Load / store multiple Instructions.





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