[llvm-commits] [llvm] r120361 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.td ARMInstrThumb.td

[Bill Wendling]

Author: void
Date: Mon Nov 29 18:08:20 2010
New Revision: 120361

URL: http://llvm.org/viewvc/llvm-project?rev=120361&view=rev
Log:
Predicate encoding should be withing {}s. And general cleanup.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=120361&r1=120360&r2=120361&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 29 18:08:20 2010
@@ -1177,19 +1177,17 @@
 
 // LEApcrel - Load a pc-relative address into a register without offending the
 // assembler.
-let neverHasSideEffects = 1 in {
-let isReMaterializable = 1 in
+let neverHasSideEffects = 1, isReMaterializable = 1 in
 // FIXME: We want one cannonical LEApcrel instruction and to express one or
 // both of these as pseudo-instructions that get expanded to it.
 def LEApcrel : AXI1<0, (outs GPR:$Rd), (ins i32imm:$label, pred:$p),
                     MiscFrm, IIC_iALUi,
-                    "adr$p\t$Rd, #$label", []>;
+                    "adr${p}\t$Rd, #$label", []>;
 
-} // neverHasSideEffects
 def LEApcrelJT : AXI1<0b0100, (outs GPR:$Rd),
                            (ins i32imm:$label, nohash_imm:$id, pred:$p),
                       MiscFrm, IIC_iALUi,
-                      "adr$p\t$Rd, #${label}_${id}", []> {
+                      "adr${p}\t$Rd, #${label}_${id}", []> {
   bits<4> p;
   bits<4> Rd;
   let Inst{31-28} = p;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=120361&r1=120360&r2=120361&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Mon Nov 29 18:08:20 2010
@@ -1240,13 +1240,11 @@
 
 // tLEApcrel - Load a pc-relative address into a register without offending the
 // assembler.
-let neverHasSideEffects = 1 in {
-let isReMaterializable = 1 in
+let neverHasSideEffects = 1, isReMaterializable = 1 in
 def tLEApcrel : T1I<(outs tGPR:$dst), (ins i32imm:$label, pred:$p), IIC_iALUi,
                     "adr${p}\t$dst, #$label", []>,
                 T1Encoding<{1,0,1,0,0,?}>; // A6.2 & A8.6.10
 
-} // neverHasSideEffects
 def tLEApcrelJT : T1I<(outs tGPR:$dst),
                       (ins i32imm:$label, nohash_imm:$id, pred:$p),
                       IIC_iALUi, "adr${p}\t$dst, #${label}_${id}", []>,