[llvm-commits] [llvm] r120193 - in /llvm/trunk/lib/Target/ARM: ARMScheduleA8.td ARMScheduleA9.td

[Bob Wilson]

Author: bwilson
Date: Sat Nov 27 00:35:09 2010
New Revision: 120193

URL: http://llvm.org/viewvc/llvm-project?rev=120193&view=rev
Log:
Fix incorrect scheduling itineraries for NEON vld1/vst1 instructions.
I added these instructions recently but I have no idea where these "1"
values in the NextCycles field came from.  As far as I can tell now,
these instruction stages are clearly intended to overlap.

Modified:
    llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
    llvm/trunk/lib/Target/ARM/ARMScheduleA9.td

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA8.td?rev=120193&r1=120192&r2=120193&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleA8.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleA8.td Sat Nov 27 00:35:09 2010
@@ -465,13 +465,13 @@
   //
   // VLD1ln
   InstrItinData<IIC_VLD1ln,   [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
-                               InstrStage<3, [A8_NLSPipe], 1>,
+                               InstrStage<3, [A8_NLSPipe], 0>,
                                InstrStage<3, [A8_LSPipe]>],
                               [3, 1, 1, 1]>,
   //
   // VLD1lnu
   InstrItinData<IIC_VLD1lnu,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
-                               InstrStage<3, [A8_NLSPipe], 1>,
+                               InstrStage<3, [A8_NLSPipe], 0>,
                                InstrStage<3, [A8_LSPipe]>],
                               [3, 2, 1, 1, 1, 1]>,
   //
@@ -609,13 +609,13 @@
   //
   // VST1ln
   InstrItinData<IIC_VST1ln,   [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
-                               InstrStage<2, [A8_NLSPipe], 1>,
+                               InstrStage<2, [A8_NLSPipe], 0>,
                                InstrStage<2, [A8_LSPipe]>],
                               [1, 1, 1]>,
   //
   // VST1lnu
   InstrItinData<IIC_VST1lnu,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
-                               InstrStage<2, [A8_NLSPipe], 1>,
+                               InstrStage<2, [A8_NLSPipe], 0>,
                                InstrStage<2, [A8_LSPipe]>],
                               [2, 1, 1, 1, 1]>,
   //

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleA9.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td?rev=120193&r1=120192&r2=120193&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleA9.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleA9.td Sat Nov 27 00:35:09 2010
@@ -800,7 +800,7 @@
                                InstrStage<1, [A9_MUX0], 0>,
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<9, [A9_DRegsVFP], 0, Reserved>,
-                               InstrStage<3, [A9_NPipe], 1>,
+                               InstrStage<3, [A9_NPipe], 0>,
                                InstrStage<3, [A9_LSUnit]>],
                               [4, 1, 1, 1]>,
   //
@@ -809,7 +809,7 @@
                                InstrStage<1, [A9_MUX0], 0>,
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<9, [A9_DRegsVFP], 0, Reserved>,
-                               InstrStage<3, [A9_NPipe], 1>,
+                               InstrStage<3, [A9_NPipe], 0>,
                                InstrStage<3, [A9_LSUnit]>],
                               [4, 2, 1, 1, 1, 1]>,
   //
@@ -1018,7 +1018,7 @@
                                InstrStage<1, [A9_MUX0], 0>,
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<2, [A9_DRegsVFP], 0, Reserved>,
-                               InstrStage<2, [A9_NPipe], 1>,
+                               InstrStage<2, [A9_NPipe], 0>,
                                InstrStage<2, [A9_LSUnit]>],
                               [1, 1, 1]>,
   //
@@ -1027,7 +1027,7 @@
                                InstrStage<1, [A9_MUX0], 0>,
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<3, [A9_DRegsVFP], 0, Reserved>,
-                               InstrStage<3, [A9_NPipe], 1>,
+                               InstrStage<3, [A9_NPipe], 0>,
                                InstrStage<3, [A9_LSUnit]>],
                               [2, 1, 1, 1, 1]>,
   //