[llvm-commits] [llvm] r119186 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/PeepholeOptimizer.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h
Evan Cheng
evan.cheng at apple.com
Mon Nov 15 13:20:45 PST 2010
Author: evancheng
Date: Mon Nov 15 15:20:45 2010
New Revision: 119186
URL: http://llvm.org/viewvc/llvm-project?rev=119186&view=rev
Log:
Code clean up. The peephole pass should be the one updating the instruction
iterator, not TII->OptimizeCompareInstr.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=119186&r1=119185&r2=119186&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Nov 15 15:20:45 2010
@@ -602,12 +602,10 @@
/// OptimizeCompareInstr - See if the comparison instruction can be converted
/// into something more efficient. E.g., on ARM most instructions can set the
- /// flags register, obviating the need for a separate CMP. Update the iterator
- /// *only* if a transformation took place.
+ /// flags register, obviating the need for a separate CMP.
virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr,
unsigned SrcReg, int Mask, int Value,
- const MachineRegisterInfo *MRI,
- MachineBasicBlock::iterator &) const {
+ const MachineRegisterInfo *MRI) const {
return false;
}
Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp?rev=119186&r1=119185&r2=119186&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Mon Nov 15 15:20:45 2010
@@ -82,8 +82,7 @@
}
private:
- bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB,
- MachineBasicBlock::iterator &MII);
+ bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB);
bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
SmallPtrSet<MachineInstr*, 8> &LocalMIs);
};
@@ -112,12 +111,10 @@
bool PeepholeOptimizer::
OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
- LocalMIs.insert(MI);
-
unsigned SrcReg, DstReg, SubIdx;
if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx))
return false;
-
+
if (TargetRegisterInfo::isPhysicalRegister(DstReg) ||
TargetRegisterInfo::isPhysicalRegister(SrcReg))
return false;
@@ -242,8 +239,7 @@
/// set) the same flag as the compare, then we can remove the comparison and use
/// the flag from the previous instruction.
bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
- MachineBasicBlock *MBB,
- MachineBasicBlock::iterator &NextIter){
+ MachineBasicBlock *MBB){
// If this instruction is a comparison against zero and isn't comparing a
// physical register, we can try to optimize it.
unsigned SrcReg;
@@ -253,7 +249,7 @@
return false;
// Attempt to optimize the comparison instruction.
- if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI, NextIter)) {
+ if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI)) {
++NumEliminated;
return true;
}
@@ -262,6 +258,9 @@
}
bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
+ if (DisablePeephole)
+ return false;
+
TM = &MF.getTarget();
TII = TM->getInstrInfo();
MRI = &MF.getRegInfo();
@@ -276,17 +275,16 @@
for (MachineBasicBlock::iterator
MII = I->begin(), MIE = I->end(); MII != MIE; ) {
- MachineInstr *MI = &*MII;
+ MachineInstr *MI = &*MII++;
+ LocalMIs.insert(MI);
+
+ if (MI->getDesc().hasUnmodeledSideEffects())
+ continue;
- if (MI->getDesc().isCompare() &&
- !MI->getDesc().hasUnmodeledSideEffects()) {
- if (!DisablePeephole && OptimizeCmpInstr(MI, MBB, MII))
- Changed = true;
- else
- ++MII;
+ if (MI->getDesc().isCompare()) {
+ Changed |= OptimizeCmpInstr(MI, MBB);
} else {
Changed |= OptimizeExtInstr(MI, MBB, LocalMIs);
- ++MII;
}
}
}
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=119186&r1=119185&r2=119186&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Nov 15 15:20:45 2010
@@ -1484,12 +1484,10 @@
}
/// OptimizeCompareInstr - Convert the instruction supplying the argument to the
-/// comparison into one that sets the zero bit in the flags register. Update the
-/// iterator *only* if a transformation took place.
+/// comparison into one that sets the zero bit in the flags register.
bool ARMBaseInstrInfo::
OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask,
- int CmpValue, const MachineRegisterInfo *MRI,
- MachineBasicBlock::iterator &MII) const {
+ int CmpValue, const MachineRegisterInfo *MRI) const {
if (CmpValue != 0)
return false;
@@ -1561,7 +1559,6 @@
MI->RemoveOperand(5);
MachineInstrBuilder(MI)
.addReg(ARM::CPSR, RegState::Define | RegState::Implicit);
- MII = llvm::next(MachineBasicBlock::iterator(CmpInstr));
CmpInstr->eraseFromParent();
return true;
}
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=119186&r1=119185&r2=119186&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Mon Nov 15 15:20:45 2010
@@ -344,8 +344,7 @@
/// that we can remove a "comparison with zero".
virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg,
int CmpMask, int CmpValue,
- const MachineRegisterInfo *MRI,
- MachineBasicBlock::iterator &MII) const;
+ const MachineRegisterInfo *MRI) const;
virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
const MachineInstr *MI) const;
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