[llvm-commits] [llvm] r117979 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp

[Chris Lattner]

Author: lattner
Date: Mon Nov  1 18:57:23 2010
New Revision: 117979

URL: http://llvm.org/viewvc/llvm-project?rev=117979&view=rev
Log:
fix computation of ambiguous instructions to not ignore the mnemonic.
FWIW, X86 has 254 ambiguous instructions.

Modified:
    llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp

Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=117979&r1=117978&r2=117979&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Mon Nov  1 18:57:23 2010
@@ -411,6 +411,10 @@
   /// ambiguously match the same set of operands as \arg RHS (without being a
   /// strictly superior match).
   bool CouldMatchAmiguouslyWith(const MatchableInfo &RHS) {
+    // The primary comparator is the instruction mnemonic.
+    if (Tokens[0] != RHS.Tokens[0])
+      return false;
+    
     // The number of operands is unambiguous.
     if (Operands.size() != RHS.Operands.size())
       return false;
@@ -849,8 +853,8 @@
 }
 
 void AsmMatcherInfo::BuildOperandClasses() {
-  std::vector<Record*> AsmOperands;
-  AsmOperands = Records.getAllDerivedDefinitions("AsmOperandClass");
+  std::vector<Record*> AsmOperands =
+    Records.getAllDerivedDefinitions("AsmOperandClass");
 
   // Pre-populate AsmOperandClasses map.
   for (std::vector<Record*>::iterator it = AsmOperands.begin(),
@@ -1127,7 +1131,7 @@
       }
     }
 
-    std::sort(MIOperandList.begin(), MIOperandList.end());
+    array_pod_sort(MIOperandList.begin(), MIOperandList.end());
 
     // Compute the total number of operands.
     unsigned NumMIOperands = 0;