[llvm-commits] [llvm] r117685 - in /llvm/trunk/test/MC/ARM: neon-dup-encoding.ll neon-dup-encoding.s
Owen Anderson
resistor at mac.com
Fri Oct 29 12:09:08 PDT 2010
Author: resistor
Date: Fri Oct 29 14:09:08 2010
New Revision: 117685
URL: http://llvm.org/viewvc/llvm-project?rev=117685&view=rev
Log:
Convert this test to .s form.
Added:
llvm/trunk/test/MC/ARM/neon-dup-encoding.s
Removed:
llvm/trunk/test/MC/ARM/neon-dup-encoding.ll
Removed: llvm/trunk/test/MC/ARM/neon-dup-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neon-dup-encoding.ll?rev=117684&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/neon-dup-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/neon-dup-encoding.ll (removed)
@@ -1,115 +0,0 @@
-; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
-
-define <8 x i8> @v_dup8(i8 %A) nounwind {
-; CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee]
- %tmp1 = insertelement <8 x i8> zeroinitializer, i8 %A, i32 0
- %tmp2 = insertelement <8 x i8> %tmp1, i8 %A, i32 1
- %tmp3 = insertelement <8 x i8> %tmp2, i8 %A, i32 2
- %tmp4 = insertelement <8 x i8> %tmp3, i8 %A, i32 3
- %tmp5 = insertelement <8 x i8> %tmp4, i8 %A, i32 4
- %tmp6 = insertelement <8 x i8> %tmp5, i8 %A, i32 5
- %tmp7 = insertelement <8 x i8> %tmp6, i8 %A, i32 6
- %tmp8 = insertelement <8 x i8> %tmp7, i8 %A, i32 7
- ret <8 x i8> %tmp8
-}
-
-define <4 x i16> @v_dup16(i16 %A) nounwind {
-; CHECK: vdup.16 d16, r0 @ encoding: [0xb0,0x0b,0x80,0xee]
- %tmp1 = insertelement <4 x i16> zeroinitializer, i16 %A, i32 0
- %tmp2 = insertelement <4 x i16> %tmp1, i16 %A, i32 1
- %tmp3 = insertelement <4 x i16> %tmp2, i16 %A, i32 2
- %tmp4 = insertelement <4 x i16> %tmp3, i16 %A, i32 3
- ret <4 x i16> %tmp4
-}
-
-define <2 x i32> @v_dup32(i32 %A) nounwind {
-; CHECK: vdup.32 d16, r0 @ encoding: [0x90,0x0b,0x80,0xee]
- %tmp1 = insertelement <2 x i32> zeroinitializer, i32 %A, i32 0
- %tmp2 = insertelement <2 x i32> %tmp1, i32 %A, i32 1
- ret <2 x i32> %tmp2
-}
-
-define <16 x i8> @v_dupQ8(i8 %A) nounwind {
-; CHECK: vdup.8 q8, r0 @ encoding: [0x90,0x0b,0xe0,0xee]
- %tmp1 = insertelement <16 x i8> zeroinitializer, i8 %A, i32 0
- %tmp2 = insertelement <16 x i8> %tmp1, i8 %A, i32 1
- %tmp3 = insertelement <16 x i8> %tmp2, i8 %A, i32 2
- %tmp4 = insertelement <16 x i8> %tmp3, i8 %A, i32 3
- %tmp5 = insertelement <16 x i8> %tmp4, i8 %A, i32 4
- %tmp6 = insertelement <16 x i8> %tmp5, i8 %A, i32 5
- %tmp7 = insertelement <16 x i8> %tmp6, i8 %A, i32 6
- %tmp8 = insertelement <16 x i8> %tmp7, i8 %A, i32 7
- %tmp9 = insertelement <16 x i8> %tmp8, i8 %A, i32 8
- %tmp10 = insertelement <16 x i8> %tmp9, i8 %A, i32 9
- %tmp11 = insertelement <16 x i8> %tmp10, i8 %A, i32 10
- %tmp12 = insertelement <16 x i8> %tmp11, i8 %A, i32 11
- %tmp13 = insertelement <16 x i8> %tmp12, i8 %A, i32 12
- %tmp14 = insertelement <16 x i8> %tmp13, i8 %A, i32 13
- %tmp15 = insertelement <16 x i8> %tmp14, i8 %A, i32 14
- %tmp16 = insertelement <16 x i8> %tmp15, i8 %A, i32 15
- ret <16 x i8> %tmp16
-}
-
-define <8 x i16> @v_dupQ16(i16 %A) nounwind {
-; CHECK: vdup.16 q8, r0 @ encoding: [0xb0,0x0b,0xa0,0xee]
- %tmp1 = insertelement <8 x i16> zeroinitializer, i16 %A, i32 0
- %tmp2 = insertelement <8 x i16> %tmp1, i16 %A, i32 1
- %tmp3 = insertelement <8 x i16> %tmp2, i16 %A, i32 2
- %tmp4 = insertelement <8 x i16> %tmp3, i16 %A, i32 3
- %tmp5 = insertelement <8 x i16> %tmp4, i16 %A, i32 4
- %tmp6 = insertelement <8 x i16> %tmp5, i16 %A, i32 5
- %tmp7 = insertelement <8 x i16> %tmp6, i16 %A, i32 6
- %tmp8 = insertelement <8 x i16> %tmp7, i16 %A, i32 7
- ret <8 x i16> %tmp8
-}
-
-define <4 x i32> @v_dupQ32(i32 %A) nounwind {
-; CHECK: vdup.32 q8, r0 @ encoding: [0x90,0x0b,0xa0,0xee]
- %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %A, i32 0
- %tmp2 = insertelement <4 x i32> %tmp1, i32 %A, i32 1
- %tmp3 = insertelement <4 x i32> %tmp2, i32 %A, i32 2
- %tmp4 = insertelement <4 x i32> %tmp3, i32 %A, i32 3
- ret <4 x i32> %tmp4
-}
-
-define <8 x i8> @vduplane8(<8 x i8>* %A) nounwind {
- %tmp1 = load <8 x i8>* %A
-; CHECK: vdup.8 d16, d16[1] @ encoding: [0x20,0x0c,0xf3,0xf3]
- %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
- ret <8 x i8> %tmp2
-}
-
-define <4 x i16> @vduplane16(<4 x i16>* %A) nounwind {
- %tmp1 = load <4 x i16>* %A
-; CHECK: vdup.16 d16, d16[1] @ encoding: [0x20,0x0c,0xf6,0xf3]
- %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >
- ret <4 x i16> %tmp2
-}
-
-define <2 x i32> @vduplane32(<2 x i32>* %A) nounwind {
- %tmp1 = load <2 x i32>* %A
-; CHECK: vdup.32 d16, d16[1] @ encoding: [0x20,0x0c,0xfc,0xf3]
- %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> < i32 1, i32 1 >
- ret <2 x i32> %tmp2
-}
-
-define <16 x i8> @vduplaneQ8(<8 x i8>* %A) nounwind {
- %tmp1 = load <8 x i8>* %A
-; CHECK: vdup.8 q8, d16[1] @ encoding: [0x60,0x0c,0xf3,0xf3]
- %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <16 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
- ret <16 x i8> %tmp2
-}
-
-define <8 x i16> @vduplaneQ16(<4 x i16>* %A) nounwind {
- %tmp1 = load <4 x i16>* %A
-; CHECK: vdup.16 q8, d16[1] @ encoding: [0x60,0x0c,0xf6,0xf3]
- %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
- ret <8 x i16> %tmp2
-}
-
-define <4 x i32> @vduplaneQ32(<2 x i32>* %A) nounwind {
- %tmp1 = load <2 x i32>* %A
-; CHECK: vdup.32 q8, d16[1] @ encoding: [0x60,0x0c,0xfc,0xf3]
- %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >
- ret <4 x i32> %tmp2
-}
Added: llvm/trunk/test/MC/ARM/neon-dup-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neon-dup-encoding.s?rev=117685&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/neon-dup-encoding.s (added)
+++ llvm/trunk/test/MC/ARM/neon-dup-encoding.s Fri Oct 29 14:09:08 2010
@@ -0,0 +1,27 @@
+// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// XFAIL: *
+
+// CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee]
+ vdup.8 d16, r0
+// CHECK: vdup.16 d16, r0 @ encoding: [0xb0,0x0b,0x80,0xee]
+ vdup.16 d16, r0
+// CHECK: vdup.32 d16, r0 @ encoding: [0x90,0x0b,0x80,0xee]
+ vdup.32 d16, r0
+// CHECK: vdup.8 q8, r0 @ encoding: [0x90,0x0b,0xe0,0xee]
+ vdup.8 q8, r0
+// CHECK: vdup.16 q8, r0 @ encoding: [0xb0,0x0b,0xa0,0xee]
+ vdup.16 q8, r0
+// CHECK: vdup.32 q8, r0 @ encoding: [0x90,0x0b,0xa0,0xee]
+ vdup.32 q8, r0
+// CHECK: vdup.8 d16, d16[1] @ encoding: [0x20,0x0c,0xf3,0xf3]
+ vdup.8 d16, d16[1]
+// CHECK: vdup.16 d16, d16[1] @ encoding: [0x20,0x0c,0xf6,0xf3]
+ vdup.16 d16, d16[1]
+// CHECK: vdup.32 d16, d16[1] @ encoding: [0x20,0x0c,0xfc,0xf3]
+ vdup.32 d16, d16[1]
+// CHECK: vdup.8 q8, d16[1] @ encoding: [0x60,0x0c,0xf3,0xf3]
+ vdup.8 q8, d16[1]
+// CHECK: vdup.16 q8, d16[1] @ encoding: [0x60,0x0c,0xf6,0xf3]
+ vdup.16 q8, d16[1]
+// CHECK: vdup.32 q8, d16[1] @ encoding: [0x60,0x0c,0xfc,0xf3]
+ vdup.32 q8, d16[1]
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