[llvm-commits] [llvm] r117119 - in /llvm/trunk/lib/Target/ARM: ARMCallingConv.td ARMISelLowering.cpp

[Sandeep Patel]

While this may be a simpler change for the debugger and other
projects, you might want to consider using more of the AAPCS-VFP ABI
for FastCC on Darwin. For example, the hard float structure passing
rules would greatly help with performance of vector and matrix
operations.

deep

On Fri, Oct 22, 2010 at 6:23 PM, Evan Cheng <evan.cheng at apple.com> wrote:
> Author: evancheng
> Date: Fri Oct 22 13:23:05 2010
> New Revision: 117119
>
> URL: http://llvm.org/viewvc/llvm-project?rev=117119&view=rev
> Log:
> Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by -arm-fastcc for now.
>
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMCallingConv.td
>    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMCallingConv.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCallingConv.td?rev=117119&r1=117118&r2=117119&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMCallingConv.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMCallingConv.td Fri Oct 22 13:23:05 2010
> @@ -53,6 +53,34 @@
>  ]>;
>
>  //===----------------------------------------------------------------------===//
> +// ARM APCS Calling Convention for FastCC (when VFP2 or later is available)
> +//===----------------------------------------------------------------------===//
> +def FastCC_ARM_APCS : CallingConv<[
> +  // Handle all vector types as either f64 or v2f64.
> +  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
> +  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
> +
> +  CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
> +  CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
> +  CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
> +                                 S9, S10, S11, S12, S13, S14, S15]>>,
> +  CCDelegateTo<CC_ARM_APCS>
> +]>;
> +
> +def RetFastCC_ARM_APCS : CallingConv<[
> +  // Handle all vector types as either f64 or v2f64.
> +  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
> +  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
> +
> +  CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
> +  CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
> +  CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
> +                                 S9, S10, S11, S12, S13, S14, S15]>>,
> +  CCDelegateTo<RetCC_ARM_APCS>
> +]>;
> +
> +
> +//===----------------------------------------------------------------------===//
>  // ARM AAPCS (EABI) Calling Convention, common parts
>  //===----------------------------------------------------------------------===//
>
> @@ -105,6 +133,7 @@
>
>  //===----------------------------------------------------------------------===//
>  // ARM AAPCS-VFP (EABI) Calling Convention
> +// Also used for FastCC (when VFP2 or later is available)
>  //===----------------------------------------------------------------------===//
>
>  def CC_ARM_AAPCS_VFP : CallingConv<[
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=117119&r1=117118&r2=117119&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Oct 22 13:23:05 2010
> @@ -69,6 +69,10 @@
>   cl::desc("Enable / disable ARM interworking (for debugging only)"),
>   cl::init(true));
>
> +static cl::opt<bool>
> +ARMFastCC("arm-fastcc", cl::Hidden,
> +  cl::desc("Use AAPCS / AAPCS-VFP calling conventions for fastcc"));
> +
>  void ARMTargetLowering::addTypeForNEON(EVT VT, EVT PromotedLdStVT,
>                                        EVT PromotedBitwiseVT) {
>   if (VT != PromotedLdStVT) {
> @@ -955,23 +959,29 @@
>   switch (CC) {
>   default:
>     llvm_unreachable("Unsupported calling convention");
> -  case CallingConv::C:
>   case CallingConv::Fast:
> +    if (ARMFastCC && Subtarget->hasVFP2() && !isVarArg) {
> +      if (!Subtarget->isAAPCS_ABI())
> +        return (Return ? RetFastCC_ARM_APCS : FastCC_ARM_APCS);
> +      // For AAPCS ABI targets, just use VFP variant of the calling convention.
> +      return (Return ? RetCC_ARM_AAPCS_VFP : CC_ARM_AAPCS_VFP);
> +    }
> +    // Fallthrough
> +  case CallingConv::C: {
>     // Use target triple & subtarget features to do actual dispatch.
> -    if (Subtarget->isAAPCS_ABI()) {
> -      if (Subtarget->hasVFP2() &&
> -          FloatABIType == FloatABI::Hard && !isVarArg)
> -        return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP);
> -      else
> -        return (Return ? RetCC_ARM_AAPCS: CC_ARM_AAPCS);
> -    } else
> -        return (Return ? RetCC_ARM_APCS: CC_ARM_APCS);
> +    if (!Subtarget->isAAPCS_ABI())
> +      return (Return ? RetCC_ARM_APCS : CC_ARM_APCS);
> +    else if (Subtarget->hasVFP2() &&
> +             FloatABIType == FloatABI::Hard && !isVarArg)
> +      return (Return ? RetCC_ARM_AAPCS_VFP : CC_ARM_AAPCS_VFP);
> +    return (Return ? RetCC_ARM_AAPCS : CC_ARM_AAPCS);
> +  }
>   case CallingConv::ARM_AAPCS_VFP:
> -    return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP);
> +    return (Return ? RetCC_ARM_AAPCS_VFP : CC_ARM_AAPCS_VFP);
>   case CallingConv::ARM_AAPCS:
> -    return (Return ? RetCC_ARM_AAPCS: CC_ARM_AAPCS);
> +    return (Return ? RetCC_ARM_AAPCS : CC_ARM_AAPCS);
>   case CallingConv::ARM_APCS:
> -    return (Return ? RetCC_ARM_APCS: CC_ARM_APCS);
> +    return (Return ? RetCC_ARM_APCS : CC_ARM_APCS);
>   }
>  }
>
>
>
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