[llvm-commits] [llvm] r117050 - /llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

[Jim Grosbach]

Author: grosbach
Date: Thu Oct 21 14:38:40 2010
New Revision: 117050

URL: http://llvm.org/viewvc/llvm-project?rev=117050&view=rev
Log:
trailing whitespace

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=117050&r1=117049&r2=117050&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Oct 21 14:38:40 2010
@@ -497,7 +497,7 @@
   return true;
 }
 
-bool ARMDAGToDAGISel::SelectAddrMode5(SDValue N, 
+bool ARMDAGToDAGISel::SelectAddrMode5(SDValue N,
                                       SDValue &Base, SDValue &Offset) {
   if (N.getOpcode() != ISD::ADD) {
     Base = N;
@@ -1215,7 +1215,7 @@
         RegSeq = SDValue(PairDRegs(MVT::v2i64, V0, V1), 0);
       else {
         SDValue V2 = N->getOperand(2+3);
-        // If it's a vld3, form a quad D-register and leave the last part as 
+        // If it's a vld3, form a quad D-register and leave the last part as
         // an undef.
         SDValue V3 = (NumVecs == 3)
           ? SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,dl,VT), 0)
@@ -1330,7 +1330,7 @@
   Ops.push_back(MemAddr);
   Ops.push_back(Align);
 
-  unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : 
+  unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
                                   QOpcodes[OpcodeIndex]);
 
   SDValue SuperReg;
@@ -1397,7 +1397,7 @@
     RegSeq = SDValue(PairDRegs(MVT::v16i8, V0, V1), 0);
   else {
     SDValue V2 = N->getOperand(FirstTblReg + 2);
-    // If it's a vtbl3, form a quad D-register and leave the last part as 
+    // If it's a vtbl3, form a quad D-register and leave the last part as
     // an undef.
     SDValue V3 = (NumVecs == 3)
       ? SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, VT), 0)