[llvm-commits] [llvm] r115515 - /llvm/trunk/docs/ReleaseNotes.html

Chris Lattner sabre at nondot.org
Mon Oct 4 09:46:07 PDT 2010


Author: lattner
Date: Mon Oct  4 11:46:07 2010
New Revision: 115515

URL: http://llvm.org/viewvc/llvm-project?rev=115515&view=rev
Log:
scheduler update

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115515&r1=115514&r2=115515&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct  4 11:46:07 2010
@@ -734,12 +734,11 @@
     is available from a previous instruction.</li>
 <li>Atomic operations now get legalized into simpler atomic operations if not
     natively supported, easing the implementation burden on targets.</li>
-<li>The bottom-up pre-allocation scheduler is now register pressure aware,
-    allowing it to avoid overscheduling in high pressure situations while still
-    aggressively scheduling when registers are available.</li>
-<li>A new instruction-level-parallelism pre-allocation scheduler is available,
-    which is also register pressure aware.  This scheduler has shown substantial
-    wins on X86-64 and is on by default.</li>
+<li>We have added two new bottom-up pre-allocation register pressure aware schedulers:
+<ol>
+<li>The hybrid scheduler schedules aggressively to minimize schedule length when registers are available and avoid overscheduling in high pressure situations.</li>
+<li>The instruction-level-parallelism scheduler schedules for maximum ILP when registers are available and avoid overscheduling in high pressure situations.</li>
+</ol></li>
 <li>The tblgen type inference algorithm was rewritten to be more consistent and
      diagnose more target bugs.  If you have an out-of-tree backend, you may
      find that it finds bugs in your target description.  This support also





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