[llvm-commits] [llvm] r115098 - in /llvm/trunk: include/llvm/Target/TargetInstrItineraries.h lib/CodeGen/ScheduleDAGInstrs.cpp lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/ARMSchedule.td lib/Targ

[Anton Korobeynikov]

>> Right now the scheduling documentation is pretty sparse...
>> Will it be possible to add some hunk of documentation into e.g. .td?
>
> I'm not sure what to write yet. But yes.
Well, at least the stuff mentioned below :)

>> Am I right to understand that currently bypasses always have zero latencies?
> No, it reduces the corresponding operand latency by one. It's probably not right, but that fits with the architectures that I am familiar with.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University