[llvm-commits] [llvm] r115047 - in /llvm/trunk: lib/Target/ARM/ARMLoadStoreOptimizer.cpp lib/Target/ARM/ARMSubtarget.h test/CodeGen/ARM/align.ll

[Bob Wilson]

Author: bwilson
Date: Wed Sep 29 12:54:10 2010
New Revision: 115047

URL: http://llvm.org/viewvc/llvm-project?rev=115047&view=rev
Log:
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned.  Radar 8489376.

Modified:
    llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
    llvm/trunk/lib/Target/ARM/ARMSubtarget.h
    llvm/trunk/test/CodeGen/ARM/align.ll

Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=115047&r1=115046&r2=115047&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Wed Sep 29 12:54:10 2010
@@ -1370,7 +1370,7 @@
   unsigned Align = (*Op0->memoperands_begin())->getAlignment();
   const Function *Func = MF->getFunction();
   unsigned ReqAlign = STI->hasV6Ops()
-    ? TD->getPrefTypeAlignment(Type::getInt64Ty(Func->getContext())) 
+    ? TD->getABITypeAlignment(Type::getInt64Ty(Func->getContext())) 
     : 8;  // Pre-v6 need 8-byte align
   if (Align < ReqAlign)
     return false;

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=115047&r1=115046&r2=115047&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Wed Sep 29 12:54:10 2010
@@ -218,7 +218,7 @@
   std::string getDataLayout() const {
     if (isThumb()) {
       if (isAPCS_ABI()) {
-        return std::string("e-p:32:32-f64:32:32-i64:32:32-"
+        return std::string("e-p:32:32-f64:32:64-i64:32:64-"
                            "i16:16:32-i8:8:32-i1:8:32-"
                            "v128:32:128-v64:32:64-a:0:32-n32");
       } else {
@@ -228,7 +228,7 @@
       }
     } else {
       if (isAPCS_ABI()) {
-        return std::string("e-p:32:32-f64:32:32-i64:32:32-"
+        return std::string("e-p:32:32-f64:32:64-i64:32:64-"
                            "v128:32:128-v64:32:64-n32");
       } else {
         return std::string("e-p:32:32-f64:64:64-i64:64:64-"

Modified: llvm/trunk/test/CodeGen/ARM/align.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/align.ll?rev=115047&r1=115046&r2=115047&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/align.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/align.ll Wed Sep 29 12:54:10 2010
@@ -22,7 +22,7 @@
 @e = global i64 4
 ;ELF: .align 3
 ;ELF: e
-;DARWIN: .align 2
+;DARWIN: .align 3
 ;DARWIN: _e:
 
 @f = global float 5.0
@@ -34,7 +34,7 @@
 @g = global double 6.0
 ;ELF: .align 3
 ;ELF: g:
-;DARWIN: .align 2
+;DARWIN: .align 3
 ;DARWIN: _g:
 
 @bar = common global [75 x i8] zeroinitializer, align 128