[llvm-commits] [llvm] r114995 - in /llvm/trunk: lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMSubtarget.h test/CodeGen/ARM/ifcvt10.ll

Owen Anderson resistor at mac.com
Tue Sep 28 14:57:50 PDT 2010


Author: resistor
Date: Tue Sep 28 16:57:50 2010
New Revision: 114995

URL: http://llvm.org/viewvc/llvm-project?rev=114995&view=rev
Log:
Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise
cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
    llvm/trunk/lib/Target/ARM/ARMSubtarget.h
    llvm/trunk/test/CodeGen/ARM/ifcvt10.ll

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=114995&r1=114994&r2=114995&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Sep 28 16:57:50 2010
@@ -1203,7 +1203,8 @@
   
   // Attempt to estimate the relative costs of predication versus branching.
   float UnpredCost = Probability * NumInstrs;
-  UnpredCost += 2.0; // FIXME: Should model a misprediction cost.
+  UnpredCost += 1.0; // The branch itself
+  UnpredCost += 0.1 * Subtarget.getMispredictionPenalty();
   
   float PredCost = NumInstrs;
   
@@ -1220,7 +1221,8 @@
   
   // Attempt to estimate the relative costs of predication versus branching.
   float UnpredCost = Probability * NumT + (1.0 - Probability) * NumF;
-  UnpredCost += 2.0; // FIXME: Should model a misprediction cost.
+  UnpredCost += 1.0; // The branch itself
+  UnpredCost += 0.1 * Subtarget.getMispredictionPenalty();
   
   float PredCost = NumT + NumF;
   

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=114995&r1=114994&r2=114995&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Tue Sep 28 16:57:50 2010
@@ -185,6 +185,18 @@
   return false;
 }
 
+unsigned ARMSubtarget::getMispredictionPenalty() const {
+  // If we have a reasonable estimate of the pipeline depth, then we can
+  // estimate the penalty of a misprediction based on that.
+  if (isCortexA8())
+    return 13;
+  else if (isCortexA9())
+    return 8;
+  
+  // Otherwise, just return a sensible default.
+  return 10;
+}
+
 bool ARMSubtarget::enablePostRAScheduler(
            CodeGenOpt::Level OptLevel,
            TargetSubtarget::AntiDepBreakMode& Mode,

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=114995&r1=114994&r2=114995&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Tue Sep 28 16:57:50 2010
@@ -194,6 +194,8 @@
 
   const std::string & getCPUString() const { return CPUString; }
 
+  unsigned getMispredictionPenalty() const;
+  
   /// enablePostRAScheduler - True at 'More' optimization.
   bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
                              TargetSubtarget::AntiDepBreakMode& Mode,

Modified: llvm/trunk/test/CodeGen/ARM/ifcvt10.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt10.ll?rev=114995&r1=114994&r2=114995&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/ifcvt10.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/ifcvt10.ll Tue Sep 28 16:57:50 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a9 | FileCheck %s
 ; rdar://8402126
 ; Make sure if-converter is not predicating vldmia and ldmia. These are
 ; micro-coded and would have long issue latency even if predicated on





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