[llvm-commits] [llvm] r114856 - in /llvm/trunk/lib/Target/ARM: ARMELFWriterInfo.cpp ARMELFWriterInfo.h ARMSubtarget.h ARMTargetMachine.cpp ARMTargetMachine.h CMakeLists.txt

Jim Grosbach grosbach at apple.com
Mon Sep 27 11:41:30 PDT 2010


Um, this still changes the DataLayout bits.

On Sep 27, 2010, at 11:31 AM, Rafael Espindola wrote:

> Author: rafael
> Date: Mon Sep 27 13:31:37 2010
> New Revision: 114856
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=114856&view=rev
> Log:
> Odd additional stub framework for the ARM MC ELF emission.
> llc now recognizes the "intent" to support MC/obj emission for ARM, but
> given that they are all stubs, it asserts on --filetype=obj --march=arm
> 
> Patch by Jason Kim.
> 
> Added:
>    llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp
>    llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMSubtarget.h
>    llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
>    llvm/trunk/lib/Target/ARM/ARMTargetMachine.h
>    llvm/trunk/lib/Target/ARM/CMakeLists.txt
> 
> Added: llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp?rev=114856&view=auto
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp (added)
> +++ llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp Mon Sep 27 13:31:37 2010
> @@ -0,0 +1,65 @@
> +//===-- ARMELFWriterInfo.cpp - ELF Writer Info for the ARM backend --------===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open Source
> +// License. See LICENSE.TXT for details.
> +//
> +//===----------------------------------------------------------------------===//
> +//
> +// This file implements ELF writer information for the ARM backend.
> +//
> +//===----------------------------------------------------------------------===//
> +
> +#include "ARMELFWriterInfo.h"
> +#include "ARMRelocations.h"
> +#include "llvm/Function.h"
> +#include "llvm/Support/ErrorHandling.h"
> +#include "llvm/Target/TargetData.h"
> +#include "llvm/Target/TargetMachine.h"
> +
> +using namespace llvm;
> +
> +//===----------------------------------------------------------------------===//
> +//  Implementation of the ARMELFWriterInfo class
> +//===----------------------------------------------------------------------===//
> +
> +ARMELFWriterInfo::ARMELFWriterInfo(TargetMachine &TM)
> +  : TargetELFWriterInfo(TM) {
> +  // silently OK construction
> +}
> +
> +ARMELFWriterInfo::~ARMELFWriterInfo() {}
> +
> +unsigned ARMELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
> +  assert(0 && "ARMELFWriterInfo::getRelocationType() not implemented");
> +  return 0;
> +}
> +
> +long int ARMELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
> +                                                    long int Modifier) const {
> +  assert(0 && "ARMELFWriterInfo::getDefaultAddendForRelTy() not implemented");
> +  return 0;
> +}
> +
> +unsigned ARMELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
> +  assert(0 && "ARMELFWriterInfo::getRelocationTySize() not implemented");
> +  return 0;
> +}
> +
> +bool ARMELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
> +  assert(0 && "ARMELFWriterInfo::isPCRelativeRel() not implemented");
> +  return 1;
> +}
> +
> +unsigned ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
> +  assert(0 && "ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not implemented");
> +  return 0;
> +}
> +
> +long int ARMELFWriterInfo::computeRelocation(unsigned SymOffset,
> +                                             unsigned RelOffset,
> +                                             unsigned RelTy) const {
> +  assert(0 && "ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not implemented");
> +  return 0;
> +}
> 
> Added: llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h?rev=114856&view=auto
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h (added)
> +++ llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h Mon Sep 27 13:31:37 2010
> @@ -0,0 +1,66 @@
> +//===-- ARMELFWriterInfo.h - ELF Writer Info for ARM ------------*- C++ -*-===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open Source
> +// License. See LICENSE.TXT for details.
> +//
> +//===----------------------------------------------------------------------===//
> +//
> +// This file implements ELF writer information for the ARM backend.
> +//
> +//===----------------------------------------------------------------------===//
> +
> +#ifndef ARM_ELF_WRITER_INFO_H
> +#define ARM_ELF_WRITER_INFO_H
> +
> +#include "llvm/Target/TargetELFWriterInfo.h"
> +
> +namespace llvm {
> +
> +  class ARMELFWriterInfo : public TargetELFWriterInfo {
> +
> +    // ELF Relocation types for ARM
> +    // FIXME: TODO(jasonwkim): [2010/09/17 14:52:25 PDT (Friday)]
> +    // Come up with a better way to orgnize the 100+ ARM reloc types.
> +
> +    enum ARMRelocationType {
> +    };
> +
> +  public:
> +    ARMELFWriterInfo(TargetMachine &TM);
> +    virtual ~ARMELFWriterInfo();
> +
> +    /// getRelocationType - Returns the target specific ELF Relocation type.
> +    /// 'MachineRelTy' contains the object code independent relocation type
> +    virtual unsigned getRelocationType(unsigned MachineRelTy) const;
> +
> +    /// hasRelocationAddend - True if the target uses an addend in the
> +    /// ELF relocation entry.
> +    virtual bool hasRelocationAddend() const { return false; }
> +
> +    /// getDefaultAddendForRelTy - Gets the default addend value for a
> +    /// relocation entry based on the target ELF relocation type.
> +    virtual long int getDefaultAddendForRelTy(unsigned RelTy,
> +                                              long int Modifier = 0) const;
> +
> +    /// getRelTySize - Returns the size of relocatable field in bits
> +    virtual unsigned getRelocationTySize(unsigned RelTy) const;
> +
> +    /// isPCRelativeRel - True if the relocation type is pc relative
> +    virtual bool isPCRelativeRel(unsigned RelTy) const;
> +
> +    /// getJumpTableRelocationTy - Returns the machine relocation type used
> +    /// to reference a jumptable.
> +    virtual unsigned getAbsoluteLabelMachineRelTy() const;
> +
> +    /// computeRelocation - Some relocatable fields could be relocated
> +    /// directly, avoiding the relocation symbol emission, compute the
> +    /// final relocation value for this symbol.
> +    virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
> +                                       unsigned RelTy) const;
> +  };
> +
> +} // end llvm namespace
> +
> +#endif // ARM_ELF_WRITER_INFO_H
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=114856&r1=114855&r2=114856&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
> +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Mon Sep 27 13:31:37 2010
> @@ -204,6 +204,29 @@
>   /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect
>   /// symbol.
>   bool GVIsIndirectSymbol(const GlobalValue *GV, Reloc::Model RelocM) const;
> +
> +  /// getDataLayout() - returns the ARM/Thumb specific TargetLayout string
> +  std::string getDataLayout() const {
> +    if (isThumb()) {
> +      if (isAPCS_ABI()) {
> +        return std::string("e-p:32:32-f64:32:32-i64:32:32-"
> +                           "i16:16:32-i8:8:32-i1:8:32-"
> +                           "v128:32:128-v64:32:64-a:0:32-n32");
> +      } else {
> +        return std::string("e-p:32:32-f64:64:64-i64:64:64-"
> +                           "i16:16:32-i8:8:32-i1:8:32-"
> +                           "v128:64:128-v64:64:64-a:0:32-n32");
> +      }
> +    } else {
> +      if (isAPCS_ABI()) {
> +        return std::string("e-p:32:32-f64:32:32-i64:32:32-"
> +                           "v128:32:128-v64:32:64-n32");
> +      } else {
> +        return std::string("e-p:32:32-f64:64:64-i64:64:64-"
> +                           "v128:64:128-v64:64:64-n32");
> +      }
> +    }
> +  };
> };
> } // End llvm namespace
> 
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=114856&r1=114855&r2=114856&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Mon Sep 27 13:31:37 2010
> @@ -31,6 +31,26 @@
>   }
> }
> 
> +// This is duplicated code. Refactor this.
> +static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
> +                                    MCContext &Ctx, TargetAsmBackend &TAB,
> +                                    raw_ostream &_OS,
> +                                    MCCodeEmitter *_Emitter,
> +                                    bool RelaxAll) {
> +  Triple TheTriple(TT);
> +  switch (TheTriple.getOS()) {
> +  case Triple::Darwin:
> +    return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
> +  case Triple::MinGW32:
> +  case Triple::MinGW64:
> +  case Triple::Cygwin:
> +  case Triple::Win32:
> +    assert(0 && "ARM does not support Windows COFF format"); break;
> +  default:
> +    return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
> +  }
> +}
> +
> extern "C" void LLVMInitializeARMTarget() {
>   // Register the target.
>   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
> @@ -39,6 +59,19 @@
>   // Register the target asm info.
>   RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
>   RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
> +
> +  // Register the MC Code Emitter
> +  TargetRegistry::RegisterCodeEmitter(TheARMTarget,
> +                                      createARMMCCodeEmitter);
> +  TargetRegistry::RegisterCodeEmitter(TheThumbTarget,
> +                                      createARMMCCodeEmitter);
> +
> +  // Register the object streamer.
> +  TargetRegistry::RegisterObjectStreamer(TheARMTarget,
> +                                         createMCStreamer);
> +  TargetRegistry::RegisterObjectStreamer(TheThumbTarget,
> +                                         createMCStreamer);
> +
> }
> 
> /// TargetMachine ctor - Create an ARM architecture model.
> @@ -51,18 +84,17 @@
>     Subtarget(TT, FS, isThumb),
>     FrameInfo(Subtarget),
>     JITInfo(),
> -    InstrItins(Subtarget.getInstrItineraryData()) {
> +    InstrItins(Subtarget.getInstrItineraryData()),
> +    DataLayout(Subtarget.getDataLayout()),
> +    ELFWriterInfo(*this)
> +{
>   DefRelocModel = getRelocationModel();
> }
> 
> ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
>                                    const std::string &FS)
> -  : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
> -    DataLayout(Subtarget.isAPCS_ABI() ?
> -               std::string("e-p:32:32-f64:32:32-i64:32:32-"
> -                           "v128:32:128-v64:32:64-n32") :
> -               std::string("e-p:32:32-f64:64:64-i64:64:64-"
> -                           "v128:64:128-v64:64:64-n32")),
> +  : ARMBaseTargetMachine(T, TT, FS, false),
> +    InstrInfo(Subtarget),
>     TLInfo(*this),
>     TSInfo(*this) {
>   if (!Subtarget.hasARMOps())
> @@ -76,13 +108,6 @@
>     InstrInfo(Subtarget.hasThumb2()
>               ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
>               : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
> -    DataLayout(Subtarget.isAPCS_ABI() ?
> -               std::string("e-p:32:32-f64:32:32-i64:32:32-"
> -                           "i16:16:32-i8:8:32-i1:8:32-"
> -                           "v128:32:128-v64:32:64-a:0:32-n32") :
> -               std::string("e-p:32:32-f64:64:64-i64:64:64-"
> -                           "i16:16:32-i8:8:32-i1:8:32-"
> -                           "v128:64:128-v64:64:64-a:0:32-n32")),
>     TLInfo(*this),
>     TSInfo(*this) {
> }
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=114856&r1=114855&r2=114856&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h (original)
> +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h Mon Sep 27 13:31:37 2010
> @@ -16,7 +16,9 @@
> 
> #include "llvm/Target/TargetMachine.h"
> #include "llvm/Target/TargetData.h"
> +#include "llvm/MC/MCStreamer.h"
> #include "ARMInstrInfo.h"
> +#include "ARMELFWriterInfo.h"
> #include "ARMFrameInfo.h"
> #include "ARMJITInfo.h"
> #include "ARMSubtarget.h"
> @@ -38,10 +40,19 @@
>   InstrItineraryData  InstrItins;
>   Reloc::Model        DefRelocModel;    // Reloc model before it's overridden.
> 
> +protected:
> +  const TargetData    DataLayout;       // Calculates type size & alignment
> +  ARMELFWriterInfo    ELFWriterInfo;
> +
> public:
>   ARMBaseTargetMachine(const Target &T, const std::string &TT,
>                        const std::string &FS, bool isThumb);
> 
> +  virtual const TargetData       *getTargetData() const { return &DataLayout; }
> +  virtual const ARMELFWriterInfo *getELFWriterInfo() const {
> +    return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
> +  };
> +
>   virtual const ARMFrameInfo     *getFrameInfo() const { return &FrameInfo; }
>   virtual       ARMJITInfo       *getJITInfo()         { return &JITInfo; }
>   virtual const ARMSubtarget  *getSubtargetImpl() const { return &Subtarget; }
> @@ -63,7 +74,6 @@
> ///
> class ARMTargetMachine : public ARMBaseTargetMachine {
>   ARMInstrInfo        InstrInfo;
> -  const TargetData    DataLayout;       // Calculates type size & alignment
>   ARMTargetLowering   TLInfo;
>   ARMSelectionDAGInfo TSInfo;
> public:
> @@ -93,7 +103,6 @@
> class ThumbTargetMachine : public ARMBaseTargetMachine {
>   // Either Thumb1InstrInfo or Thumb2InstrInfo.
>   OwningPtr<ARMBaseInstrInfo> InstrInfo;
> -  const TargetData    DataLayout;   // Calculates type size & alignment
>   ARMTargetLowering   TLInfo;
>   ARMSelectionDAGInfo TSInfo;
> public:
> 
> Modified: llvm/trunk/lib/Target/ARM/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/CMakeLists.txt?rev=114856&r1=114855&r2=114856&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/CMakeLists.txt (original)
> +++ llvm/trunk/lib/Target/ARM/CMakeLists.txt Mon Sep 27 13:31:37 2010
> @@ -21,6 +21,7 @@
>   ARMCodeEmitter.cpp
>   ARMConstantIslandPass.cpp
>   ARMConstantPoolValue.cpp
> +  ARMELFWriterInfo.cpp
>   ARMExpandPseudoInsts.cpp
>   ARMFastISel.cpp
>   ARMGlobalMerge.cpp
> 
> 
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