[llvm-commits] [llvm] r114074 - in /llvm/trunk: lib/Target/CellSPU/SPU64InstrInfo.td lib/Target/CellSPU/SPUISelDAGToDAG.cpp lib/Target/CellSPU/SPUInstrInfo.td test/CodeGen/CellSPU/v2i32.ll

[Jakob Stoklund Olesen]

On Sep 16, 2010, at 5:29 AM, Kalle Raiskila wrote:

> Author: kraiskil
> Date: Thu Sep 16 07:29:33 2010
> New Revision: 114074
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=114074&view=rev
> Log:
> Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.
> 
> This cleans up after the mess r108567 left in the CellSPU backend.
> ORCvt-instruction were used to reinterpret registers, and the ORs were then
> removed by isMoveInstr(). This patch now removes 350 instrucions of format:
> 	or $3, $3, $3
> (from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is
> checked for.
> 
> Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain.

Hi Kalle,

When I introduced the COPY instruction, I had a hard time figuring out which SPU instructions were used as copies and which ones had side effects, so it is very likely I left some intended copies behind.

The intention is that COPY gets used for all copies, and it is the only copy instruction that gets coalesced and folded when spilling. The isMoveInstr hook is gone, and 'ori' and 'ai' look like any other instruction to the register allocator.

It looks like you are on the right track, COPY_TO_REGCLASS will be translated to a COPY instruction.

/jakob