[llvm-commits] [llvm] r113670 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/PeepholeOptimizer.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h

Gabor Greif ggreif at gmail.com
Sat Sep 11 05:43:13 PDT 2010


Bill,

I tried to extend your approach to TSTri (as an eliminable compare
instr.) and
ANDri (as an implicit compare) with this patch:

gabor at google8:~/llvm-build$ svn diff /home/gabor/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp
Index: /home/gabor/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
===================================================================
--- /home/gabor/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
(revision 113683)
+++ /home/gabor/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
(working copy)
@@ -1372,6 +1372,10 @@
     SrcReg = MI->getOperand(0).getReg();
     CmpValue = MI->getOperand(1).getImm();
     return true;
+  case ARM::TSTri:
+    SrcReg = MI->getOperand(0).getReg();
+    CmpValue = 0;
+    return true;
   }

   return false;
@@ -1421,6 +1425,7 @@
   switch (MI->getOpcode()) {
   default: break;
   case ARM::ADDri:
+  case ARM::ANDri:
   case ARM::SUBri:
   case ARM::t2ADDri:
   case ARM::t2SUBri:
gabor at google8:~/llvm-build$


BUT, it does not trigger on my example, because of
something that appears to be a bug:

        %reg16388<def> = PHI %reg16396, <BB#0>, %reg16392, <BB#3>; GPR:
%reg16388,16396,16392
        %reg16389<def> = PHI %reg16385, <BB#0>, %reg16391, <BB#3>; GPR:
%reg16389,16385,16391
        %reg16397<def> = LDR %reg16387, %reg0, 4100, pred:14, pred:
%reg0; mem:LD4[%scevgep1] GPR:%reg16397,16387
        %reg16390<def> = ANDri %reg16397, 3, pred:14, pred:%reg0, opt:
%reg0; GPR:%reg16390,16397
        TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:
%reg16397
        Bcc <BB#3>, pred:0, pred:%CPSR

The TST seems to use the result of the LDR instead of that of the AND!
Very fishy...

The bitcode is ok:

  %tmp2 = load i8** %scevgep1
  %0 = ptrtoint i8* %tmp2 to i32
  %and = and i32 %0, 3
  %tst = icmp eq i32 %and, 0
  br i1 %tst, label %sw.bb, label %tailrecurse.switch

What do you think? Okay to commit the above?

Cheers,

    Gabor


On 11 Sep., 02:13, Bill Wendling <isanb... at gmail.com> wrote:
> Author: void
> Date: Fri Sep 10 19:13:50 2010
> New Revision: 113670



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