[llvm-commits] [llvm-gcc][arm][patch] Lower function signatures a bit more

[Rafael Espindola]

> I haven't reviewed the patch, but in principle this sounds like a great idea!
>
> What IR does:
>  double foo(double X, double Y) { return X+Y; }
>
> get lowered into, and what ARM code ends up generated?

With the patch the generated IL is

----------------------------------------------------------------------
define double @foo(i32 %X.0, i32 %X.1, i32 %Y.0, i32 %Y.1) nounwind
readnone optsize {
entry:
  %tmp17 = zext i32 %X.0 to i64
  %tmp12 = zext i32 %X.1 to i64
  %tmp13 = shl i64 %tmp12, 32
  %ins15 = or i64 %tmp13, %tmp17
  %tmp6 = zext i32 %Y.0 to i64
  %tmp3 = zext i32 %Y.1 to i64
  %tmp4 = shl i64 %tmp3, 32
  %ins = or i64 %tmp4, %tmp6
  %tmp10 = bitcast i64 %ins15 to double
  %tmp2 = bitcast i64 %ins to double
  %0 = fadd double %tmp10, %tmp2
  ret double %0
}
---------------------------------------------------------------------

and the asm is

----------------------------------------------------------------
foo:
	vmov	d0, r2, r3
	vmov	d1, r0, r1
	vadd.f64	d0, d1, d0
	vmov	r0, r1, d0
	bx	lr
----------------------------------------------------------------

or with -mfloat-abi=soft

-------------------------------------------------------------
foo:
	stmdb	sp!, {r11, lr}
	bl	__adddf3
	ldmia	sp!, {r11, pc}
-------------------------------------------------------------

Currently we get a more compact but less explicit IL:
----------------------------------------
define double @foo(double %X, double %Y) nounwind readnone optsize {
entry:
  %0 = fadd double %X, %Y
  ret double %0
}
----------------------------------------

And exactly the same assembly.

> -Chris


Cheers,
-- 
Rafael Ávila de Espíndola