[llvm-commits] [llvm] r113058 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Bruno Cardoso Lopes]

Author: bruno
Date: Fri Sep  3 21:50:13 2010
New Revision: 113058

URL: http://llvm.org/viewvc/llvm-project?rev=113058&view=rev
Log:
make explicit that we not handle several mmx shuffles

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=113058&r1=113057&r2=113058&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Sep  3 21:50:13 2010
@@ -5467,19 +5467,19 @@
   SmallVector<int, 16> M;
   SVOp->getMask(M);
 
-  // Very little shuffling can be done for 64-bit vectors right now.
+  if (isPALIGNRMask(M, VT, HasSSSE3))
+    return getTargetShuffleNode(X86ISD::PALIGN, dl, VT, V1, V2,
+                                X86::getShufflePALIGNRImmediate(SVOp),
+                                DAG);
+
+  // MMX shuffles not already handled must be expanded.
   if (VT.getSizeInBits() == 64)
-    return isPALIGNRMask(M, VT, Subtarget->hasSSSE3()) ? Op : SDValue();
+    return SDValue();
 
   // FIXME: pshufb, blends, shifts.
   if (VT.getVectorNumElements() == 2)
     return Op;
 
-  if (isPALIGNRMask(M, VT, HasSSSE3))
-    return getTargetShuffleNode(X86ISD::PALIGN, dl, VT, V1, V2,
-                                X86::getShufflePALIGNRImmediate(SVOp),
-                                DAG);
-
   if (ShuffleVectorSDNode::isSplatMask(&M[0], VT) &&
       SVOp->getSplatIndex() == 0 && V2IsUndef) {
     if (VT == MVT::v2f64)