[llvm-commits] [llvm] r113016 - /llvm/trunk/lib/CodeGen/RegAllocFast.cpp

[Dale Johannesen]

Jim believes this will fix the PPC buildbot.  I've started a run, ETA  
around 5 PM (Pacific).

On Sep 3, 2010, at 2:45 PMPDT, Jim Grosbach wrote:

> Author: grosbach
> Date: Fri Sep  3 16:45:15 2010
> New Revision: 113016
>
> URL: http://llvm.org/viewvc/llvm-project?rev=113016&view=rev
> Log:
> previous patch was a little too tricky for its own good. Don't try to
> overload UserInInstr. Explicitly check Allocatable. The early exit  
> in the
> condition will mean the performance impact of the extra test should be
> minimal.
>
> Modified:
>    llvm/trunk/lib/CodeGen/RegAllocFast.cpp
>
> Modified: llvm/trunk/lib/CodeGen/RegAllocFast.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=113016&r1=113015&r2=113016&view=diff
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/RegAllocFast.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegAllocFast.cpp Fri Sep  3 16:45:15 2010
> @@ -113,9 +113,6 @@
>     // Allocatable - vector of allocatable physical registers.
>     BitVector Allocatable;
>
> -    // Reserved - vector of reserved physical registers.
> -    BitVector Reserved;
> -
>     // SkippedInstrs - Descriptors of instructions whose clobber  
> list was
>     // ignored because all registers were spilled. It is still  
> necessary to
>     // mark all the clobbered registers as used by the function.
> @@ -501,7 +498,8 @@
>   // First try to find a completely free register.
>   for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) {
>     unsigned PhysReg = *I;
> -    if (PhysRegState[PhysReg] == regFree && ! 
> UsedInInstr.test(PhysReg))
> +    if (PhysRegState[PhysReg] == regFree && ! 
> UsedInInstr.test(PhysReg) &&
> +        Allocatable.test(PhysReg))
>       return assignVirtToPhysReg(LRE, PhysReg);
>   }
>
> @@ -510,6 +508,8 @@
>
>   unsigned BestReg = 0, BestCost = spillImpossible;
>   for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) {
> +    if (!Allocatable.test(*I))
> +      continue;
>     unsigned Cost = calcSpillCost(*I);
>     // Cost is 0 when all aliases are already disabled.
>     if (Cost == 0)
> @@ -712,7 +712,7 @@
>   }
>
>   // Restore UsedInInstr to a state usable for allocating normal  
> virtual uses.
> -  UsedInInstr = Reserved;
> +  UsedInInstr.reset();
>   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
>     MachineOperand &MO = MI->getOperand(i);
>     if (!MO.isReg() || (MO.isDef() && !MO.isEarlyClobber())) continue;
> @@ -838,7 +838,7 @@
>     }
>
>     // Track registers used by instruction.
> -    UsedInInstr = Reserved;
> +    UsedInInstr.reset();
>
>     // First scan.
>     // Mark physreg uses and early clobbers as used.
> @@ -916,7 +916,7 @@
>
>     // Track registers defined by instruction - early clobbers and  
> tied uses at
>     // this point.
> -    UsedInInstr = Reserved;
> +    UsedInInstr.reset();
>     if (hasEarlyClobbers) {
>       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
>         MachineOperand &MO = MI->getOperand(i);
> @@ -1014,7 +1014,6 @@
>
>   UsedInInstr.resize(TRI->getNumRegs());
>   Allocatable = TRI->getAllocatableSet(*MF);
> -  Reserved = TRI->getReservedRegs(*MF);
>
>   // initialize the virtual->physical register map to have a 'null'
>   // mapping for all virtual registers
>
>
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