[llvm-commits] [llvm] r112841 - in /llvm/trunk: lib/Target/ARM/ARMRegisterInfo.td test/CodeGen/ARM/lsr-on-unrolled-loops.ll test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll test/CodeGen/Thumb2/ldr-str-imm12.ll test/CodeGen/Thumb2/lsr-deficiency.ll

[Jakob Stoklund Olesen]

On Sep 2, 2010, at 11:14 AM, Jim Grosbach wrote:

> Author: grosbach
> Date: Thu Sep  2 13:14:29 2010
> New Revision: 112841
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=112841&view=rev
> Log:
> Now that register allocation properly considers reserved regs, simplify the
> ARM register class allocation order functions to take advantage of that.

Yay for minusses!

But shouldn't register allocation be unaffected?

> Modified:
>    llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
>    llvm/trunk/test/CodeGen/ARM/lsr-on-unrolled-loops.ll
>    llvm/trunk/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll
>    llvm/trunk/test/CodeGen/Thumb2/ldr-str-imm12.ll
>    llvm/trunk/test/CodeGen/Thumb2/lsr-deficiency.ll