[llvm-commits] [llvm] r112175 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp test/CodeGen/X86/sse1.ll test/CodeGen/X86/vec_cast.ll

Chris Lattner sabre at nondot.org
Wed Aug 25 23:57:07 PDT 2010


Author: lattner
Date: Thu Aug 26 01:57:07 2010
New Revision: 112175

URL: http://llvm.org/viewvc/llvm-project?rev=112175&view=rev
Log:
Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/test/CodeGen/X86/sse1.ll
    llvm/trunk/test/CodeGen/X86/vec_cast.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=112175&r1=112174&r2=112175&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Aug 26 01:57:07 2010
@@ -1314,6 +1314,8 @@
           break;
         case TargetLowering::Expand:
           if (!TLI.isLoadExtLegal(ISD::EXTLOAD, SrcVT)) {
+            // FIXME: If SrcVT isn't legal, then this introduces an illegal
+            // type.
             SDValue Load = DAG.getLoad(SrcVT, dl, Tmp1, Tmp2, LD->getSrcValue(),
                                        LD->getSrcValueOffset(),
                                        LD->isVolatile(), LD->isNonTemporal(),

Modified: llvm/trunk/test/CodeGen/X86/sse1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse1.ll?rev=112175&r1=112174&r2=112175&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse1.ll Thu Aug 26 01:57:07 2010
@@ -12,3 +12,9 @@
   %c = trunc <8 x i32> %a to <8 x i16>            ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %c
 }
+
+; PR7993
+;define <4 x i32> @test3(<4 x i16> %a) nounwind {
+;  %c = sext <4 x i16> %a to <4 x i32>             ; <<4 x i32>> [#uses=1]
+;  ret <4 x i32> %c
+;}

Modified: llvm/trunk/test/CodeGen/X86/vec_cast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_cast.ll?rev=112175&r1=112174&r2=112175&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_cast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_cast.ll Thu Aug 26 01:57:07 2010
@@ -1,5 +1,6 @@
-; RUN: llc < %s -march=x86-64 
-; RUN: llc < %s -march=x86-64 -disable-mmx
+; RUN: llc < %s -march=x86-64 -mcpu=core2
+; RUN: llc < %s -march=x86-64 -mcpu=core2 -disable-mmx
+
 
 define <8 x i32> @a(<8 x i16> %a) nounwind {
   %c = sext <8 x i16> %a to <8 x i32>





More information about the llvm-commits mailing list