[llvm-commits] [llvm] r112039 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

[Eric Christopher]

Author: echristo
Date: Wed Aug 25 03:43:57 2010
New Revision: 112039

URL: http://llvm.org/viewvc/llvm-project?rev=112039&view=rev
Log:
Do type checks before we bother to do everything else.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=112039&r1=112038&r2=112039&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Wed Aug 25 03:43:57 2010
@@ -415,14 +415,19 @@
 }
 
 bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
-  // Our register and offset with innocuous defaults.
-  unsigned Reg = 0;
-  int Offset = 0;
-  
   // If we're an alloca we know we have a frame index and can emit the load
   // directly in short order.
   if (ARMLoadAlloca(I))
     return true;
+    
+  // Verify we have a legal type before going any further.
+  EVT VT;
+  if (!isTypeLegal(I->getType(), VT))
+    return false;
+  
+  // Our register and offset with innocuous defaults.
+  unsigned Reg = 0;
+  int Offset = 0;
   
   // See if we can handle this as Reg + Offset
   if (!ARMComputeRegOffset(I->getOperand(0), Reg, Offset))
@@ -445,10 +450,6 @@
                            static_cast<const ARMBaseInstrInfo&>(TII));
   } 
   
-  EVT VT;
-  if (!isTypeLegal(I->getType(), VT))
-    return false;
-
   unsigned ResultReg;
   // TODO: Verify the additions above work, otherwise we'll need to add the
   // offset instead of 0 and do all sorts of operand munging.