[llvm-commits] [llvm] r108846 - in /llvm/trunk/test/CodeGen/Thumb2: 2010-04-15-DynAllocBug.ll thumb2-and2.ll thumb2-uxtb.ll

[Jim Grosbach]

Author: grosbach
Date: Tue Jul 20 11:16:48 2010
New Revision: 108846

URL: http://llvm.org/viewvc/llvm-project?rev=108846&view=rev
Log:
update tests for smarter BIC usage

Modified:
    llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
    llvm/trunk/test/CodeGen/Thumb2/thumb2-and2.ll
    llvm/trunk/test/CodeGen/Thumb2/thumb2-uxtb.ll

Modified: llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll?rev=108846&r1=108845&r2=108846&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll Tue Jul 20 11:16:48 2010
@@ -7,13 +7,11 @@
 define void @t() nounwind ssp {
 entry:
 ; CHECK: t:
-; CHECK: mov r0, sp
-; CHECK: bfc r0, #0, #3
+; CHECK: bic r0, sp, #7
 ; CHECK: subs r0, #16
 ; CHECK: mov sp, r0
 ; Yes, this is stupid codegen, but it's correct.
-; CHECK: mov r0, sp
-; CHECK: bfc r0, #0, #3
+; CHECK: bic r0, sp, #7
 ; CHECK: subs r0, #16
 ; CHECK: mov sp, r0
   %size = mul i32 8, 2

Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-and2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-and2.ll?rev=108846&r1=108845&r2=108846&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/thumb2-and2.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-and2.ll Tue Jul 20 11:16:48 2010
@@ -30,7 +30,7 @@
     ret i32 %tmp
 }
 ; CHECK: f4:
-; CHECK: 	and	r0, r0, #1448498774
+; CHECK: bic r0, r0, #-1448498775
 
 ; 66846720 = 0x03fc0000
 define i32 @f5(i32 %a) {

Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-uxtb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-uxtb.ll?rev=108846&r1=108845&r2=108846&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/thumb2-uxtb.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-uxtb.ll Tue Jul 20 11:16:48 2010
@@ -6,7 +6,7 @@
 ; ARMv7A: uxtb16 r0, r0
 
 ; ARMv7M: test1
-; ARMv7M: and r0, r0, #16711935
+; ARMv7M: bic r0, r0, #-16711936
 	%tmp1 = and i32 %x, 16711935		; <i32> [#uses=1]
 	ret i32 %tmp1
 }