[llvm-commits] [llvm] r108735 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/TargetLowering.cpp

[Evan Cheng]

On Jul 19, 2010, at 1:22 PM, Jakob Stoklund Olesen wrote:

> 
> On Jul 19, 2010, at 1:11 PM, Evan Cheng wrote:
> 
>> 
>> On Jul 19, 2010, at 12:59 PM, Jakob Stoklund Olesen wrote:
>> 
>>> 
>>> On Jul 19, 2010, at 11:47 AM, Evan Cheng wrote:
>>> 
>>>> Author: evancheng
>>>> Date: Mon Jul 19 13:47:01 2010
>>>> New Revision: 108735
>>>> 
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=108735&view=rev
>>>> Log:
>>>> Teach computeRegisterProperties() to compute "representative" register class for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.
>>>> 
>>>> This property will be used by the register pressure tracking instruction scheduler.
>>> 
>>> Hi Evan,
>>> 
>>> This looks a lot like you have x86 in mind.
>> 
>> No. What is x86? :-)
>> 
>>> 
>>> What is getRepRegClassFor(f32) going to return on ARM? QQQQ?
>> 
>> QQ and QQQQ are not legal during isel. It's Q. It's probably overly conservative for tracking. I'm still trying to figure that out.
>> 
>> 
>>> 
>>> How are you planning to deal with registers with more than one usable subregister?
>> 
>> I am not sure what you mean? It's ignore sub-register classes (e.g. QPR_VFP2).
> 
> I meant the same as above - QPR only has 16 registers, but there are 32 DPR registers. If you are counting each DPR as a QPR, you are going to be scheduling as if you only had 16 DPR registers.
> 
> Can you use some kind of scaling so a DPR counts as 0.5 QPR?
> 

No, I don't like that. I was hoping to avoid having targets provide findRepresentativeClass(). But I think it cannot be avoided.

Evan