[llvm-commits] [llvm] r108555 - in /llvm/trunk/lib/Target/PowerPC: PPCInstrInfo.cpp PPCInstrInfo.td

[Chris Lattner]

On Jul 16, 2010, at 2:35 PM, Jakob Stoklund Olesen wrote:

> 
> On Jul 16, 2010, at 2:22 PM, Chris Lattner wrote:
> 
>> With COPY, would it be reasonable/possible to write patterns for copy instructions in td files now?
> 
> Do you mean like this:
> 
> def : Pat<(f64 (fextend F4RC:$src)), (COPY F4RC:$src)>
> 
> That might work. The code for inferring the register class of that COPY def is a bit weak ATM. Ideally, the register class could be inferred from the uses, and we could get rid of COPY_TO_REGCLASS entirely.

That would also be nice, but I was thinking something more like changing:

let neverHasSideEffects = 1 in {
def MOV8rr  : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src),
                "mov{b}\t{$src, $dst|$dst, $src}", []>;
def MOV16rr : I<0x89, MRMDestReg, (outs GR16:$dst), (ins GR16:$src),
                "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
                "mov{l}\t{$src, $dst|$dst, $src}", []>;
}

to:

def MOV8rr  : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src),
                "mov{b}\t{$src, $dst|$dst, $src}",
                [(set GR8:$dst, (copy GR8:$src)]>;

This has two benefits: neverHasSideEffects (and others) can now be inferred, and tblgen could conceptually generate the code for X86InstrInfo::copyPhysReg.

For risc targets that don't have actual copy instructions, using a Pat<> pattern to map into into an "or" instruction (or whatever is the preferred idiom) should also be possible in theory.

-Chris