[llvm-commits] [llvm] r108226 - in /llvm/trunk: lib/Target/X86/Disassembler/X86Disassembler.cpp test/MC/Disassembler/simple-tests.txt

[Chris Lattner]

Author: lattner
Date: Mon Jul 12 23:23:55 2010
New Revision: 108226

URL: http://llvm.org/viewvc/llvm-project?rev=108226&view=rev
Log:
my work on adding segment registers to LEA missed the 
disassembler.  Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.

Modified:
    llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
    llvm/trunk/test/MC/Disassembler/simple-tests.txt

Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp?rev=108226&r1=108225&r2=108226&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Mon Jul 12 23:23:55 2010
@@ -252,13 +252,8 @@
 /// @param mcInst       - The MCInst to append to.
 /// @param insn         - The instruction to extract Mod, R/M, and SIB fields
 ///                       from.
-/// @param sr           - Whether or not to emit the segment register.  The
-///                       LEA instruction does not expect a segment-register
-///                       operand.
 /// @return             - 0 on success; nonzero otherwise
-static bool translateRMMemory(MCInst &mcInst,
-                              InternalInstruction &insn,
-                              bool sr) {
+static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn) {
   // Addresses in an MCInst are represented as five operands:
   //   1. basereg       (register)  The R/M base, or (if there is a SIB) the 
   //                                SIB base
@@ -385,10 +380,7 @@
   mcInst.addOperand(scaleAmount);
   mcInst.addOperand(indexReg);
   mcInst.addOperand(displacement);
-  
-  if (sr)
-    mcInst.addOperand(segmentReg);
-  
+  mcInst.addOperand(segmentReg);
   return false;
 }
 
@@ -439,9 +431,8 @@
   case TYPE_M1616:
   case TYPE_M1632:
   case TYPE_M1664:
-    return translateRMMemory(mcInst, insn, true);
   case TYPE_LEA:
-    return translateRMMemory(mcInst, insn, false);
+    return translateRMMemory(mcInst, insn);
   }
 }
   

Modified: llvm/trunk/test/MC/Disassembler/simple-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/simple-tests.txt?rev=108226&r1=108225&r2=108226&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/simple-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/simple-tests.txt Mon Jul 12 23:23:55 2010
@@ -57,3 +57,6 @@
 
 # CHECK: movq	%cr0, %rcx
 0x0f 0x20 0xc1
+
+# CHECK: leal	4(%rsp), %ecx
+0x8d 0x4c 0x24 0x04 
\ No newline at end of file