[llvm-commits] [llvm] r108022 - /llvm/trunk/lib/Target/X86/X86RegisterInfo.td

[Bruno Cardoso Lopes]

Author: bruno
Date: Fri Jul  9 16:46:19 2010
New Revision: 108022

URL: http://llvm.org/viewvc/llvm-project?rev=108022&view=rev
Log:
Declare YMM subregisters in the right way! Thanks Jakob

Modified:
    llvm/trunk/lib/Target/X86/X86RegisterInfo.td

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=108022&r1=108021&r2=108022&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Fri Jul  9 16:46:19 2010
@@ -181,8 +181,7 @@
   }
 
   // YMM Registers, used by AVX instructions
-  // The sub_ss and sub_sd subregs are the same registers with another regclass.
-  let CompositeIndices = [(sub_ss), (sub_sd)], SubRegIndices = [sub_xmm] in {
+  let SubRegIndices = [sub_xmm] in {
   def YMM0: RegisterWithSubRegs<"ymm0", [XMM0]>, DwarfRegNum<[17, 21, 21]>;
   def YMM1: RegisterWithSubRegs<"ymm1", [XMM1]>, DwarfRegNum<[18, 22, 22]>;
   def YMM2: RegisterWithSubRegs<"ymm2", [XMM2]>, DwarfRegNum<[19, 23, 23]>;