[llvm-commits] [llvm] r107996 - in /llvm/trunk: lib/Target/X86/AsmPrinter/X86ATTInstPrinter.h lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86InstrSSE.td lib/Target/X86/X86MCCodeEmitter.cpp lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86RegisterInfo.td test/MC/AsmParser/X86/x86_32-encoding.s test/MC/AsmParser/X86/x86_64-encoding.s utils/TableGen/EDEmitter.cpp

[Jakob Stoklund Olesen]

On Jul 9, 2010, at 11:27 AM, Bruno Cardoso Lopes wrote:

> 
>   // YMM Registers, used by AVX instructions
> -  let SubRegIndices = [sub_xmm] in {
> +  // The sub_ss and sub_sd subregs are the same registers with another regclass.
> +  let CompositeIndices = [(sub_ss), (sub_sd)], SubRegIndices = [sub_xmm] in {
>   def YMM0: RegisterWithSubRegs<"ymm0", [XMM0]>, DwarfRegNum<[17, 21, 21]>;
>   def YMM1: RegisterWithSubRegs<"ymm1", [XMM1]>, DwarfRegNum<[18, 22, 22]>;
>   def YMM2: RegisterWithSubRegs<"ymm2", [XMM2]>, DwarfRegNum<[19, 23, 23]>;

Was this change on purpose?

It means that getSubReg(YMM0, sub_ss) returns YMM0 instead of XMM0. Do you want to do scalar operations in YMM registers?

If you just want getSubReg(YMM0, sub_ss) -> XMM0, just leave it as it was before. YMM0 will inherit the sub_ss subregister from XMM0.

Look at X86GenRegisterInfo::getSubReg:

  case X86::YMM0:
    switch (Index) {
    default: return 0;
    case X86::sub_sd: return X86::YMM0;
    case X86::sub_ss: return X86::YMM0;
    case X86::sub_xmm: return X86::XMM0;
    };
    break;