[llvm-commits] [llvm] r107660 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/Target/TargetRegisterInfo.cpp

[Dan Gohman]

Author: djg
Date: Tue Jul  6 10:31:55 2010
New Revision: 107660

URL: http://llvm.org/viewvc/llvm-project?rev=107660&view=rev
Log:
Make getMinimalPhysRegClass' comment mention what makes it different
from getPhysicalRegisterRegClass.

Modified:
    llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
    llvm/trunk/lib/Target/TargetRegisterInfo.cpp

Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=107660&r1=107659&r2=107660&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Tue Jul  6 10:31:55 2010
@@ -320,7 +320,8 @@
     getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
 
   /// getMinimalPhysRegClass - Returns the Register Class of a physical
-  /// register of the given type.
+  /// register of the given type, picking the most sub register class of
+  /// the right type that contains this physreg.
   const TargetRegisterClass *
     getMinimalPhysRegClass(unsigned Reg, EVT VT = MVT::Other) const;
 

Modified: llvm/trunk/lib/Target/TargetRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetRegisterInfo.cpp?rev=107660&r1=107659&r2=107660&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetRegisterInfo.cpp Tue Jul  6 10:31:55 2010
@@ -61,7 +61,8 @@
 }
 
 /// getMinimalPhysRegClass - Returns the Register Class of a physical
-/// register of the given type.
+/// register of the given type, picking the most sub register class of
+/// the right type that contains this physreg.
 const TargetRegisterClass *
 TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg, EVT VT) const {
   assert(isPhysicalRegister(reg) && "reg must be a physical register");