[llvm-commits] [llvm] r106891 - /llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp

[Bob Wilson]

Author: bwilson
Date: Fri Jun 25 16:17:19 2010
New Revision: 106891

URL: http://llvm.org/viewvc/llvm-project?rev=106891&view=rev
Log:
Add support for encoding 2-register NEON instructions.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=106891&r1=106890&r2=106891&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Fri Jun 25 16:17:19 2010
@@ -139,7 +139,8 @@
 
     void emitMiscInstruction(const MachineInstr &MI);
 
-    void emitNEON1RegModImm(const MachineInstr &MI);
+    void emitNEON1RegModImmInstruction(const MachineInstr &MI);
+    void emitNEON2RegInstruction(const MachineInstr &MI);
 
     /// getMachineOpValue - Return binary encoding of operand. If the machine
     /// operand requires relocation, record the relocation and return zero.
@@ -412,7 +413,10 @@
     break;
   // NEON instructions.
   case ARMII::N1RegModImmFrm:
-    emitNEON1RegModImm(MI);
+    emitNEON1RegModImmInstruction(MI);
+    break;
+  case ARMII::N2RegFrm:
+    emitNEON2RegInstruction(MI);
     break;
   }
   MCE.processDebugLoc(MI.getDebugLoc(), false);
@@ -1555,7 +1559,16 @@
   return Binary;
 }
 
-void ARMCodeEmitter::emitNEON1RegModImm(const MachineInstr &MI) {
+static unsigned encodeNEONRm(const MachineInstr &MI, unsigned OpIdx) {
+  unsigned RegM = MI.getOperand(OpIdx).getReg();
+  unsigned Binary = 0;
+  RegM = ARMRegisterInfo::getRegisterNumbering(RegM);
+  Binary |= (RegM & 0xf);
+  Binary |= ((RegM >> 4) & 1) << ARMII::M_BitShift;
+  return Binary;
+}
+
+void ARMCodeEmitter::emitNEON1RegModImmInstruction(const MachineInstr &MI) {
   unsigned Binary = getBinaryCodeForInstr(MI);
   // Destination register is encoded in Dd.
   Binary |= encodeNEONRd(MI, 0);
@@ -1574,4 +1587,13 @@
   emitWordLE(Binary);
 }
 
+void ARMCodeEmitter::emitNEON2RegInstruction(const MachineInstr &MI) {
+  unsigned Binary = getBinaryCodeForInstr(MI);
+  // Destination register is encoded in Dd.
+  Binary |= encodeNEONRd(MI, 0);
+  Binary |= encodeNEONRm(MI, 1);
+  // FIXME: This does not handle VDUPfdf or VDUPfqf.
+  emitWordLE(Binary);
+}
+
 #include "ARMGenCodeEmitter.inc"