[llvm-commits] [llvm] r106361 - /llvm/trunk/lib/Target/X86/X86InstrSSE.td

Bruno Cardoso Lopes bruno.cardoso at gmail.com
Fri Jun 18 17:09:28 PDT 2010


Author: bruno
Date: Fri Jun 18 19:09:27 2010
New Revision: 106361

URL: http://llvm.org/viewvc/llvm-project?rev=106361&view=rev
Log:
Clean up: remove now unnecessary Constraints

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=106361&r1=106360&r2=106361&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Fri Jun 18 19:09:27 2010
@@ -699,11 +699,10 @@
 /// These three forms can each be reg+reg or reg+mem, so there are a total of
 /// six "instructions".
 ///
-let Constraints = "$src1 = $dst" in {
 multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
                                  SDNode OpNode, bit Commutable = 0> {
 
-  let Constraints = "", isAsmParserOnly = 1 in {
+  let isAsmParserOnly = 1 in {
     defm V#NAME#SS : sse12_fp_scalar<opc,
         !strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
                    OpNode, FR32, f32mem>, XS, VEX_4V;
@@ -757,7 +756,6 @@
                   "2", "_sd", sdmem, sse_load_f64>, XD;
   }
 }
-}
 
 // Arithmetic instructions
 defm ADD : basic_sse12_fp_binop_rm<0x58, "add", fadd, 1>;





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