[llvm-commits] [llvm] r105845 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll

Bob Wilson bob.wilson at apple.com
Fri Jun 11 15:45:25 PDT 2010


Author: bwilson
Date: Fri Jun 11 17:45:25 2010
New Revision: 105845

URL: http://llvm.org/viewvc/llvm-project?rev=105845&view=rev
Log:
Add a missing bitcast.  This code used to only handle conversions between
i64 and f64 types, but now it also handle Neon vector types, so the f64 result
of VMOVDRR may need to be converted to a Neon type.  Radar 8084742.

Added:
    llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=105845&r1=105844&r2=105845&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Jun 11 17:45:25 2010
@@ -2447,7 +2447,8 @@
                              DAG.getConstant(0, MVT::i32));
     SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op,
                              DAG.getConstant(1, MVT::i32));
-    return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
+    return DAG.getNode(ISD::BIT_CONVERT, dl, DstVT,
+                       DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi));
   }
 
   // Turn f64->i64 into VMOVRRD.

Added: llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll?rev=105845&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll Fri Jun 11 17:45:25 2010
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=arm -mattr=+neon
+; Radar 8084742
+
+%struct.__int8x8x2_t = type { [2 x <8 x i8>] }
+
+define arm_apcscc void @foo(%struct.__int8x8x2_t* nocapture %a, i8* %b) nounwind {
+entry:
+ %0 = bitcast %struct.__int8x8x2_t* %a to i128*  ; <i128*> [#uses=1]
+ %srcval = load i128* %0, align 8                ; <i128> [#uses=2]
+ %tmp6 = trunc i128 %srcval to i64               ; <i64> [#uses=1]
+ %tmp8 = lshr i128 %srcval, 64                   ; <i128> [#uses=1]
+ %tmp9 = trunc i128 %tmp8 to i64                 ; <i64> [#uses=1]
+ %tmp16.i = bitcast i64 %tmp6 to <8 x i8>        ; <<8 x i8>> [#uses=1]
+ %tmp20.i = bitcast i64 %tmp9 to <8 x i8>        ; <<8 x i8>> [#uses=1]
+ tail call void @llvm.arm.neon.vst2.v8i8(i8* %b, <8 x i8> %tmp16.i, <8 x i8> %tmp20.i) nounwind
+ ret void
+}
+
+declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>) nounwind





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