[llvm-commits] [llvm] r105269 - in /llvm/trunk: lib/Target/CellSPU/SPUISelDAGToDAG.cpp test/CodeGen/CellSPU/loads.ll

[Kalle Raiskila]

Author: kraiskil
Date: Tue Jun  1 08:34:47 2010
New Revision: 105269

URL: http://llvm.org/viewvc/llvm-project?rev=105269&view=rev
Log:
Fix handling of 'load' nodes.

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
    llvm/trunk/test/CodeGen/CellSPU/loads.ll

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=105269&r1=105268&r2=105269&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Tue Jun  1 08:34:47 2010
@@ -611,13 +611,7 @@
 
     if (OpOpc == ISD::STORE || OpOpc == ISD::LOAD) {
       // Direct load/store without getelementptr
-      SDValue Addr, Offs;
-
-      // Get the register from CopyFromReg
-      if (Opc == ISD::CopyFromReg)
-        Addr = N.getOperand(1);
-      else
-        Addr = N;                       // Register
+      SDValue Offs;
 
       Offs = ((OpOpc == ISD::STORE) ? Op->getOperand(3) : Op->getOperand(2));
 
@@ -626,7 +620,7 @@
           Offs = CurDAG->getTargetConstant(0, Offs.getValueType());
 
         Base = Offs;
-        Index = Addr;
+        Index = N;
         return true;
       }
     } else {

Modified: llvm/trunk/test/CodeGen/CellSPU/loads.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/loads.ll?rev=105269&r1=105268&r2=105269&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/CellSPU/loads.ll (original)
+++ llvm/trunk/test/CodeGen/CellSPU/loads.ll Tue Jun  1 08:34:47 2010
@@ -18,3 +18,16 @@
 	ret <4 x float> %tmp1
 ; CHECK:	lqd	$3, 16($3)
 }
+
+
+declare <4 x i32>* @getv4f32ptr()
+define <4 x i32> @func() {
+        ;CHECK: brasl
+        ;CHECK: lr	{{\$[0-9]*, \$3}}
+        ;CHECK: brasl
+        %rv1 = call <4 x i32>* @getv4f32ptr()
+        %rv2 = call <4 x i32>* @getv4f32ptr()
+        %rv3 = load <4 x i32>* %rv1
+        ret <4 x i32> %rv3
+}
+