[llvm-commits] [llvm] r104653 - /llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp

[Evan Cheng]

Sorry I have been behind on patch reviews. I have some concerns about these patches. We want to prevent special casing for individual instructions. Is it not possible to add generic support for these?

Evan

On May 25, 2010, at 5:25 PM, Shih-wei Liao <sliao at google.com> wrote:

> Author: sliao
> Date: Tue May 25 19:25:05 2010
> New Revision: 104653
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=104653&view=rev
> Log:
> Adding the missing implementation of Bitfield's "clear" and "insert".
> Fixing http://llvm.org/bugs/show_bug.cgi?id=7222.
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=104653&r1=104652&r2=104653&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Tue May 25 19:25:05 2010
> @@ -781,10 +781,6 @@
>                                                    unsigned ImplicitRn) {
>   const TargetInstrDesc &TID = MI.getDesc();
> 
> -  if (TID.Opcode == ARM::BFC) {
> -    report_fatal_error("ARMv6t2 JIT is not yet supported.");
> -  }
> -
>   // Part of binary is determined by TableGn.
>   unsigned Binary = getBinaryCodeForInstr(MI);
> 
> @@ -820,6 +816,15 @@
>       Binary |= ((Hi16 >> 12) & 0xF) << 16;
>       emitWordLE(Binary);
>       return;
> +  } else if((TID.Opcode == ARM::BFC) || (TID.Opcode == ARM::BFI)) {
> +      uint32_t v = ~MI.getOperand(2).getImm();
> +      int32_t lsb = CountTrailingZeros_32(v);
> +      int32_t msb = (32 - CountLeadingZeros_32(v)) - 1;
> +      // Insts[20-16] = msb, Insts[11-7] = lsb
> +      Binary |= (msb & 0x1F) << 16;
> +      Binary |= (lsb & 0x1F) << 7;
> +      emitWordLE(Binary);
> +      return;
>   }
> 
>   // If this is a two-address operand, skip it. e.g. MOVCCr operand 1.
> 
> 
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