[llvm-commits] Patch for Cygwin llvm for llvm-gcc total regression

[Aaron Gray]

Basically llvm-gcc on Cygwin was failing to build since r97884.

This patch for /lib/Target/X86/X86ISelLowering.cpp reverts the behaviour of
the X86TargetLowering::LowerDYNAMIC_STACKALLOC method just for the Cygwin
platform.

llvm-gcc builds "correctly" again with this reversion.

All changes are contained within one function that is only executed by MinGW
and Cygwin and the MinGW code is uneffected, and the Cygwin code is reverted
back to pre r97883 code.

Is there any remote chance this could get into 2.7 as it is very well self
contained method and should have no side effects.

Aaron

~~~~
SDValue
X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
                                           SelectionDAG &DAG) const {
  assert(Subtarget->isTargetCygMing() &&
         "This should be used only on Cygwin/Mingw targets");
  DebugLoc dl = Op.getDebugLoc();

  // Get the inputs.
  SDValue Chain = Op.getOperand(0);
  SDValue Size  = Op.getOperand(1);
  // FIXME: Ensure alignment here

  SDValue Flag;

  EVT IntPtr = getPointerTy();
  EVT SPTy = Subtarget->is64Bit() ? MVT::i64 : MVT::i32;


  if (Subtarget->isTargetMingw() {
    Chain = DAG.getCopyToReg(Chain, dl, X86::EAX, Size, Flag);
    Flag = Chain.getValue(1);

    SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);

    Chain = DAG.getNode(X86ISD::MINGW_ALLOCA, dl, NodeTys, Chain, Flag);
    Flag = Chain.getValue(1);

    Chain = DAG.getCopyFromReg(Chain, dl, X86StackPtr, SPTy).getValue(1);

    SDValue Ops1[2] = { Chain.getValue(0), Chain };
    return DAG.getMergeValues(Ops1, 2, dl);
  } else {
    Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(0, true));

    Chain = DAG.getCopyToReg(Chain, dl, X86::EAX, Size, Flag);
    Flag = Chain.getValue(1);

    SDVTList  NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
    SDValue Ops[] = { Chain,
                        DAG.getTargetExternalSymbol("_alloca", IntPtr),
                        DAG.getRegister(X86::EAX, IntPtr),
                        DAG.getRegister(X86StackPtr, SPTy),
                        Flag };
    Chain = DAG.getNode(X86ISD::CALL, dl, NodeTys, Ops, 5);
    Flag = Chain.getValue(1);

    Chain = DAG.getCALLSEQ_END(Chain,
                               DAG.getIntPtrConstant(0, true),
                               DAG.getIntPtrConstant(0, true),
                               Flag);

    Chain = DAG.getCopyFromReg(Chain, dl, X86StackPtr, SPTy).getValue(1);

    SDValue Ops1[2] = { Chain.getValue(0), Chain };
    return DAG.getMergeValues(Ops1, 2, dl);
  }
}
~~~~
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