[llvm-commits] [llvm] r101329 - in /llvm/trunk/lib/Target/ARM/Disassembler: ARMDisassemblerCore.cpp ThumbDisassemblerCore.h

[Johnny Chen]

Author: johnny
Date: Wed Apr 14 20:20:56 2010
New Revision: 101329

URL: http://llvm.org/viewvc/llvm-project?rev=101329&view=rev
Log:
Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101329&r1=101328&r2=101329&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr 14 20:20:56 2010
@@ -13,8 +13,11 @@
 //
 //===----------------------------------------------------------------------===//
 
+#define DEBUG_TYPE "arm-disassembler"
+
 #include "ARMDisassemblerCore.h"
 #include "ARMAddressingModes.h"
+#include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 
 /// ARMGenInstrInfo.inc - ARMGenInstrInfo.inc contains the static const
@@ -346,7 +349,7 @@
     }
     break;
   }
-  errs() << "Invalid (RegClassID, RawRegister) combination\n";
+  DEBUG(errs() << "Invalid (RegClassID, RawRegister) combination\n");
   // Encoding error.  Mark the builder with error code != 0.
   B->SetErr(-1);
   return 0;
@@ -893,7 +896,7 @@
   uint32_t msb = slice(insn, 20, 16);
   uint32_t Val = 0;
   if (msb < lsb) {
-    errs() << "Encoding error: msb < lsb\n";
+    DEBUG(errs() << "Encoding error: msb < lsb\n");
     return false;
   }
 
@@ -1911,7 +1914,7 @@
   ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn));
   // Must be either "ia" or "db" submode.
   if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) {
-    errs() << "Illegal addressing mode 5 sub-mode!\n";
+    DEBUG(errs() << "Illegal addressing mode 5 sub-mode!\n");
     return false;
   }
 

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h?rev=101329&r1=101328&r2=101329&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h Wed Apr 14 20:20:56 2010
@@ -1553,7 +1553,7 @@
     MI.addOperand(MCOperand::CreateImm(getLsb(insn)));
     if (Opcode == ARM::t2BFI) {
       if (getMsb(insn) < getLsb(insn)) {
-        errs() << "Encoding error: msb < lsb\n";
+        DEBUG(errs() << "Encoding error: msb < lsb\n");
         return false;
       }
       MI.addOperand(MCOperand::CreateImm(getMsb(insn) - getLsb(insn) + 1));